docs: OpenBSD Man Pages Added

24 files changed, 2789 insertions, 0 deletions

diff --git a/static/openbsd/man4/man4.hppa/Makefile b/static/openbsd/man4/man4.hppa/Makefile
new file mode 100644
index 00000000..7d0f06ab
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/Makefile
@@ -0,0 +1,25 @@
+MAN = asp.4 \
+      astro.4 \
+      cpu.4 \
+      dino.4 \
+      elroy.4 \
+      gecko.4 \
+      gsc.4 \
+      gsckbc.4 \
+      harmony.4 \
+      ie.4 \
+      intro.4 \
+      io.4 \
+      lasi.4 \
+      lcd.4 \
+      mem.4 \
+      mongoose.4 \
+      pdc.4 \
+      phantomas.4 \
+      power.4 \
+      runway.4 \
+      ssio.4 \
+      uturn.4 \
+      wax.4
+
+include ../../../mandoc.mk
diff --git a/static/openbsd/man4/man4.hppa/asp.4 b/static/openbsd/man4/man4.hppa/asp.4
new file mode 100644
index 00000000..517ab818
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/asp.4
@@ -0,0 +1,97 @@
+.\"	$OpenBSD: asp.4,v 1.18 2018/06/18 06:06:52 jmc Exp $
+.\"
+.\"
+.\" Copyright (c) 1999 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: June 18 2018 $
+.Dt ASP 4 hppa
+.Os
+.Sh NAME
+.Nm asp
+.Nd core bus controller as present on older HP 9000/700 machines
+.Sh SYNOPSIS
+.Cd "asp0    at mainbus? irq 28"
+.Cd "gsc* at asp?"
+.Sh DESCRIPTION
+The supported Core bus controllers are those present on older
+.Tn PA-RISC
+workstations, and include:
+.Pp
+.Bl -bullet -compact
+.It
+Core bus controller
+.It
+System clock
+.It
+Interrupt controller
+.It
+DMA controller
+.It
+Real-time clock Interface
+.It
+RAM and EEPROM controllers
+.El
+.Pp
+The irq level supplied is hardwired to the CPU pin, so changing the value
+would not produce any noticeable results (except lost interrupts for the whole
+I/O subsystem).
+.Sh MACHINES
+An incomplete list of machines that use the
+.Tn ASP
+bus controller:
+.Pp
+.Bl -bullet -compact
+.It
+705, 710
+.It
+715/{33,50,75}
+.It
+725/{50,75}
+.It
+720, 730, 750
+.It
+735/*
+.It
+745i/{50,75}
+.It
+747i/{50,75}
+.It
+755/*
+.El
+.Sh SEE ALSO
+.Xr gsc 4 ,
+.Xr intro 4 ,
+.Xr io 4
+.Rs
+.%T "Hardball I/O Subsystem ERS"
+.%N Revision 1.1
+.%D 30 September 1991
+.%Q Hewlett-Packard
+.Re
+.Sh HISTORY
+The
+.Nm
+driver
+appeared in
+.Ox 2.4 .
diff --git a/static/openbsd/man4/man4.hppa/astro.4 b/static/openbsd/man4/man4.hppa/astro.4
new file mode 100644
index 00000000..56fac913
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/astro.4
@@ -0,0 +1,43 @@
+.\"	$OpenBSD: astro.4,v 1.3 2007/05/31 19:19:54 jmc Exp $
+.\"
+.\" Copyright (c) 2007 Mark Kettenis <kettenis@openbsd.org>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate: May 31 2007 $
+.Dt ASTRO 4 hppa
+.Os
+.Sh NAME
+.Nm astro
+.Nd Astro Memory and I/O controller
+.Sh SYNOPSIS
+.Cd "astro* at mainbus?"
+.Cd "elroy* at astro?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the Astro memory and I/O controller used
+on systems with PA-8500 and later 64-bit CPUs.
+It functions as a bridge from the Runway bus to
+up to 8 I/O ropes that connect to Elroy chips.
+Astro contains an IOMMU and provides support for cache coherent DMA.
+.Sh SEE ALSO
+.Xr cpu 4 ,
+.Xr elroy 4 ,
+.Xr intro 4 ,
+.Xr runway 4
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 4.2 .
diff --git a/static/openbsd/man4/man4.hppa/cpu.4 b/static/openbsd/man4/man4.hppa/cpu.4
new file mode 100644
index 00000000..e40e156f
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/cpu.4
@@ -0,0 +1,243 @@
+.\" $OpenBSD: cpu.4,v 1.1 2022/07/11 03:11:49 daniel Exp $
+.\"
+.\" Copyright (c) 2002 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
+.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+.\" SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+.\" IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+.\" THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: July 11 2022 $
+.Dt CPU 4 hppa
+.Os
+.Sh NAME
+.Nm cpu
+.Nd HP PA-RISC CPU
+.Sh SYNOPSIS
+.Cd "cpu*       at mainbus0 irq 31"
+.Sh DESCRIPTION
+The following table lists the
+.Tn PA-RISC
+CPU types and their characteristics, such as TLB, maximum
+cache sizes (where the
+.Sq *
+character means on-chip) and
+.Tn HP 9000/700
+machines they were used in (see also
+.Xr intro 4
+for the reverse list).
+.Bl -column "7100LC" "1.1e" "MHz max" "2048 L1D*" "TLB" "BAT" "C3650, C3700, C3750"
+.It Sy CPU Ta Sy PA Ta Sy Clock Ta Sy Caches Ta Sy TLB Ta Sy BAT Ta Sy Models
+.It Ta Ta MHz max Ta KB max Ta Ta Ta ""
+.It 7000 Ta 1.1a Ta 66 Ta 256 L1I Ta 96I Ta 4I Ta 705, 710, 720
+.It Ta Ta Ta 256 L1D Ta 96D Ta 4D Ta 730, 750
+.It 7100 Ta 1.1b Ta 100 Ta 1024 L1I Ta 120 Ta 16 Ta 715/33/50/75
+.It Ta Ta Ta 2048 L1D Ta Ta Ta 725/50/75
+.It Ta Ta Ta Ta Ta Ta {735,755}/100
+.It Ta Ta Ta Ta Ta Ta 742i, 745i, 747i
+.It 7150 Ta 1.1b Ta 125 Ta 1024 L1I Ta 120 Ta 16 Ta 735/125, 755/125
+.It Ta Ta Ta 2048 L1D Ta Ta Ta ""
+.It 7100LC Ta 1.1c Ta 100 Ta 1 L1I* Ta 64 Ta 8 Ta 712/60/80/100
+.It Ta Ta Ta 1024 L2I Ta Ta Ta 715/64/80/100
+.It Ta Ta Ta 1024 L2D Ta Ta Ta 715/100XC
+.It Ta Ta Ta Ta Ta Ta 725/64/100
+.It Ta Ta Ta Ta Ta Ta 743i, 748i
+.It Ta Ta Ta Ta Ta Ta SAIC
+.It 7200 Ta 1.1d Ta 140 Ta 2 L1* Ta 120 Ta 16 Ta C100, C110
+.It Ta Ta Ta 1024 L2I Ta Ta Ta J200, J210
+.It Ta Ta Ta 1024 L2D Ta Ta Ta ""
+.It 7300LC Ta 1.1e Ta 180 Ta 64 L1I* Ta 96 Ta 8 Ta A180, A180C
+.It Ta Ta Ta 64 L1D* Ta Ta Ta B132, B160, B180
+.It Ta Ta Ta 8192 L2 Ta Ta Ta C132L, C160L
+.It Ta Ta Ta Ta Ta Ta 744, 745, 748
+.It Ta Ta Ta Ta Ta Ta RDI PrecisionBook
+.It 8000 Ta 2.0 Ta 180 Ta 1024 L1I Ta 96 Ta Ta C160, C180
+.It Ta Ta Ta 1024 L1D Ta Ta Ta J280, J282
+.It 8200 Ta 2.0 Ta 300 Ta 2048 L1I Ta 120 Ta Ta C200, C240
+.It Ta Ta Ta 2048 L1D Ta Ta Ta J2240
+.It 8500 Ta 2.0 Ta 440 Ta 512 L1I* Ta 160 Ta Ta A400, A500, C360
+.It Ta Ta Ta 1024 L1D* Ta Ta Ta B1000, B2000, C3000
+.It Ta Ta Ta Ta Ta Ta J5000, J7000
+.It 8600 Ta 2.0 Ta 550 Ta 512 L1I* Ta 160 Ta Ta A400, A500, C3600
+.It Ta Ta Ta 1024 L1D* Ta Ta Ta B2000, B2600
+.It Ta Ta Ta Ta Ta Ta J5600, J6000, J7600
+.It 8700 Ta 2.0 Ta 875 Ta 768 L1I* Ta 240 Ta Ta A400, A500, J6700
+.It Ta Ta Ta 1536 L1D* Ta Ta Ta C3650, C3700, C3750
+.El
+.Sh FLOATING-POINT COPROCESSOR
+The following table summarizes available floating-point coprocessor
+models for the 32-bit
+.Tn PA-RISC
+processors.
+.Bl -column "Sterling I MIU (ROC w/Weitek)" "712/60/80/100"
+.It Sy FPU Ta Sy Model
+.It Indigo Ta ""
+.It Sterling I MIU (TYCO) Ta ""
+.It Sterling I MIU (ROC w/Weitek) Ta ""
+.It FPC (w/Weitek) Ta ""
+.It FPC (w/Bit) Ta ""
+.It Timex-II Ta ""
+.It Rolex Ta 725/50, 745i
+.It HARP-I Ta ""
+.It Tornado Ta J2x0,C1x0
+.It PA-50 (Hitachi) Ta ""
+.It PCXL Ta 712/60/80/100
+.El
+.Sh SUPERSCALAR EXECUTION
+The following table summarizes the superscalar execution capabilities
+of 32-bit
+.Tn PA-RISC
+processors.
+.Bl -column "7100LC" "2 integer ALU" "4-way superscalar"
+.It Sy CPU Ta Sy Units Ta Sy Bundles
+.It 7100 Ta 1 integer ALU Ta load-store/fp
+.It Ta 1 FP Ta int/fp
+.It Ta Ta branch/*
+.It 7100LC Ta 2 integer ALU Ta load-store/int
+.It Ta 1 FP Ta load-store/fp
+.It Ta Ta int/fp
+.It Ta Ta branch/*
+.It 7200 Ta 2 integer ALU Ta load-store/int
+.It Ta 1 FP Ta load-store/fp
+.It Ta Ta int/int
+.It Ta Ta int/fp
+.It Ta Ta branch/*
+.It 7300LC Ta 2 integer ALU Ta load-store/int
+.It Ta 1 FP Ta load-store/fp
+.It Ta Ta int/fp
+.It Ta Ta branch/*
+.It 8x00 Ta 2 integer ALU Ta 4-way superscalar
+.It Ta 2 shift/merge Ta ""
+.It Ta 2 load/store Ta ""
+.It Ta 2 FPU mul/add Ta ""
+.It Ta 2 FPU div/sqrt Ta ""
+.El
+.Pp
+In conclusion, all of the above CPUs are dual-issue, or 2-way superscalar,
+with the exception that on CPUs with two integer ALUs only one of these
+units is capable of doing shift, load/store and test operations.
+Additionally, there are several kinds of restrictions placed upon the
+superscalar execution:
+.Pp
+For the purpose of showing which instructions are allowed to proceed
+together through the pipeline, they are divided into classes:
+.Bl -column "fsys" "FTEST and FP status/exception"
+.It Sy Class Ta Sy Description
+.It flop Ta floating point operation
+.It ldst Ta loads and stores
+.It flex Ta integer ALU
+.It mm Ta shifts, extracts and deposits
+.It nul Ta might nullify successor
+.It bv Ta BV, BE
+.It br Ta other branches
+.It fsys Ta FTEST and FP status/exception
+.It sys Ta system control instructions
+.El
+.Pp
+For CPUs with two integer ALUs (7100LC, 7200, 7300LC), the following
+table lists the instructions which are allowed to be executed
+concurrently:
+.Bl -column "flex" "flop/ldst/flex/mm/nul/br/fsys"
+.It Sy First Ta Sy Second instruction
+.It flop Ta + ldst/flex/mm/nul/bv/br
+.It ldst Ta + flop/flex/mm/nul/br
+.It flex Ta + flop/ldst/flex/mm/nul/br/fsys
+.It mm Ta + flop/ldst/flex/fsys
+.It nul Ta + flop
+.It sys Ta never bundled
+.El
+.Pp
+ldst + ldst is also possible under certain circumstances, which is then
+called "double word load/store".
+.Pp
+The following restrictions are placed upon the superscalar execution:
+.Pp
+.Bl -bullet -compact
+.It
+An instruction that modifies a register will not be bundled with another
+instruction that takes this register as operand.
+Exception: a flop can be bundled with an FP store of the flop's result register.
+.It
+An FP load to one word of a doubleword register will not be bundled with
+a flop that uses the other doubleword of this register.
+.It
+A flop will not be bundled with an FP load if both instructions have the
+same target register.
+.It
+An instruction that could set the carry/borrow bits will not be bundled
+with an instruction that uses
+carry/borrow bits.
+.It
+An instruction which is in the delay slot of a branch is never bundled
+with other instructions.
+.It
+An instruction which is at an odd word address and executed as a target
+of a taken branch is never bundled.
+.It
+An instruction which might nullify its successor is never bundled with
+this successor.
+Only if the successor is a flop instruction is this bundle allowed.
+.El
+.Sh PERFORMANCE MONITOR COPROCESSOR
+The performance monitor coprocessor is an optional,
+implementation-dependent coprocessor which provides a minimal common
+software interface to implementation-dependent performance monitor hardware.
+.Sh DEBUG SPECIAL UNIT
+The debug special function unit is an optional,
+architected SFU which provides hardware assistance for software debugging
+using breakpoints.
+The debug SFU is currently defined only for Level 0 processors.
+.Sh SEE ALSO
+.Xr asp 4 ,
+.Xr intro 4 ,
+.Xr lasi 4 ,
+.Xr mem 4 ,
+.Xr pdc 4 ,
+.Xr wax 4
+.Rs
+.%T PA-RISC 1.1 Architecture and Instruction Set Reference Manual
+.%A Hewlett-Packard
+.%D May 15, 1996
+.Re
+.Rs
+.%T PA7100LC ERS
+.%A Hewlett-Packard
+.%D March 30 1999
+.%N Public version 1.0
+.Re
+.Rs
+.%T Design of the PA7200 CPU
+.%A Hewlett-Packard Journal
+.%D February 1996
+.Re
+.Rs
+.%T PA7300LC ERS
+.%A Hewlett-Packard
+.%D March 18 1996
+.%N Version 1.0
+.Re
+.Sh HISTORY
+The
+.Nm
+driver was written by
+.An Michael Shalayeff Aq Mt mickey@openbsd.org
+for the HPPA
+port for
+.Ox 2.5 .
diff --git a/static/openbsd/man4/man4.hppa/dino.4 b/static/openbsd/man4/man4.hppa/dino.4
new file mode 100644
index 00000000..5ffc2aff
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/dino.4
@@ -0,0 +1,74 @@
+.\"	$OpenBSD: dino.4,v 1.6 2007/05/31 19:19:54 jmc Exp $
+.\"
+.\" Copyright (c) 2003 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND,
+.\" USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: May 31 2007 $
+.Dt DINO 4 hppa
+.Os
+.Sh NAME
+.Nm dino
+.Nd Dino and Cujo Host/PCI bridges
+.Sh SYNOPSIS
+.Cd "dino* at phantomas?"
+.Cd "dino* at uturn?"
+.Cd "com1 at dino? irq 11"
+.Cd "pci* at dino?"
+.Sh DESCRIPTION
+This driver supports
+.Tn Dino
+and
+.Tn Cujo
+Host/PCI bridges found on the A, B, C and J-class workstations.
+.Tn Cujo
+is a 64 bit datapath version of
+.Tn Dino .
+.Pp
+On some machines it may also provide an additional serial port through the
+.Xr com 4
+driver, or
+.Tn PS/2
+keyboard and mouse ports, though the latter are not yet supported.
+.Sh SEE ALSO
+.Xr com 4 ,
+.Xr intro 4 ,
+.Xr pci 4 ,
+.Xr phantomas 4 ,
+.Xr uturn 4
+.Sh HISTORY
+The
+.Nm
+driver
+appeared in
+.Ox 3.5 .
+.Sh BUGS
+.Nm
+bridges of revision earlier than three may exhibit data corruption on DMA.
+This hardware bug does not affect
+.Nm cujo
+or card mode
+.Nm
+bridges.
+See HP Service Note Numbers A4190A-01 and A4191A-01 for more details.
+Systems affected are those shipped before Aug 20, 1997 and
+of models: B132L, B160L, C160, C180, C200, C240.
diff --git a/static/openbsd/man4/man4.hppa/elroy.4 b/static/openbsd/man4/man4.hppa/elroy.4
new file mode 100644
index 00000000..cffa9aae
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/elroy.4
@@ -0,0 +1,39 @@
+.\"	$OpenBSD: elroy.4,v 1.2 2007/05/31 19:19:54 jmc Exp $
+.\"
+.\" Copyright (c) 2007 Mark Kettenis <kettenis@openbsd.org>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate: May 31 2007 $
+.Dt ELROY 4 hppa
+.Os
+.Sh NAME
+.Nm elroy
+.Nd Elroy PCI hostbridge
+.Sh SYNOPSIS
+.Cd "elroy* at astro?"
+.Cd "pci* at elroy?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the Elroy PCI hostbridge and its embedded
+I/O SAPIC interrupt controller.
+.Sh SEE ALSO
+.Xr astro 4 ,
+.Xr intro 4 ,
+.Xr pci 4
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 4.2 .
diff --git a/static/openbsd/man4/man4.hppa/gecko.4 b/static/openbsd/man4/man4.hppa/gecko.4
new file mode 100644
index 00000000..0f0b4ea5
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/gecko.4
@@ -0,0 +1,38 @@
+.\"     $OpenBSD: gecko.4,v 1.2 2008/04/27 19:34:00 jmc Exp $
+.\"
+.\" Copyright (c) 2007 Mark Kettenis <kettenis@openbsd.org>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate: April 27 2008 $
+.Dt GECKO 4 hppa
+.Os
+.Sh NAME
+.Nm gecko
+.Nd GeckoBOA BC GSC+ port
+.Sh SYNOPSIS
+.Cd "gecko* at uturn?"
+.Sh DESCRIPTION
+.Nm
+provides support for the GeckoBOA bus converter ports connecting additional
+GSC+ buses to
+.Xr uturn 4 .
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr uturn 4
+.Sh HISTORY
+The
+.Nm
+driver
+appeared in
+.Ox 4.4 .
diff --git a/static/openbsd/man4/man4.hppa/gsc.4 b/static/openbsd/man4/man4.hppa/gsc.4
new file mode 100644
index 00000000..b441fe05
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/gsc.4
@@ -0,0 +1,113 @@
+.\"	$OpenBSD: gsc.4,v 1.27 2011/12/21 23:12:03 miod Exp $
+.\"
+.\"
+.\" Copyright (c) 1999 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: December 21 2011 $
+.Dt GSC 4 hppa
+.Os
+.Sh NAME
+.Nm gsc
+.Nd introduction to HP 9000/700 GSC bus support
+.Sh SYNOPSIS
+.Cd "gsc* at lasi?"
+.Cd "gsc* at asp?"
+.Cd "gsc* at wax?"
+.Sh DESCRIPTION
+The General System Connect (GSC) bus
+is the core I/O bus for all HP 9000/700 workstations.
+All I/O subsystems connect to this bus.
+The devices can be either on separate chips, expansion
+cards or on an integrated megacell, like the LASI MBA.
+.Pp
+The
+.Tn GSC
+bus is a 32-bit wide, address and data multiplexed bus.
+In its "standard" implementation it has a maximum throughput of 160MB/s,
+the "2x" implementation reaches up to 250MB/s.
+Some HPPA CPUs directly attach to this bus, namely the PA7100LC and PA7300LC.
+.Pp
+As for the expansion cards, there are different form-factors, depending on
+bus-speed (standard or 2x) and specific models.
+The standard formfactor is the "EISA form-factor"; cards that look like
+typical EISA cards with a different connector (100-pin female EBBL).
+The Series 712 have their own special type
+of GSC expansion cards, called the "GIO form-factor", which is quite small and
+mostly has only one VLSI chip on it (in most cases LASI/WAX).
+Newer systems sometimes feature the "HSC formfactor", which is a 1U-VME
+card-like expansion card with a 100-pin male pin+socket connector.
+Mixing cards with different speeds is supported but downgrades
+the performance of the whole I/O-subsystem.
+.Pp
+.Ox
+provides support for the following devices:
+.Pp
+.Bl -tag -width 12n -offset indent -compact
+.It Xr arcofi 4
+Siemens PSB2160 audio codec
+.It Xr com 4
+serial communications interface
+.It Xr gsckbc 4
+PC-style keyboard controller
+.It Xr harmony 4
+CS4215/AD1849 audio
+.It Xr hil 4
+introduction to HP-HIL support
+.It Xr ie 4
+Intel i82596 Ethernet device
+.It Xr lpt 4
+parallel port driver
+.It Xr oosiop 4
+.Tn Symbios/NCR
+53C700 SCSI I/O Processor
+.It Xr osiop 4
+.Tn Symbios/NCR
+53C710 SCSI I/O Processor
+.El
+.Pp
+Some of these
+.Tn GSC
+devices also have
+.Tn PCI ,
+.Tn EISA ,
+or
+.Tn ISA
+equivalents.
+These are listed in
+.Xr pci 4 ,
+.Xr eisa 4 ,
+or
+.Xr isa 4 .
+.Sh SEE ALSO
+.Xr asp 4 ,
+.Xr cpu 4 ,
+.Xr intro 4 ,
+.Xr lasi 4 ,
+.Xr wax 4
+.Sh HISTORY
+The
+.Nm
+driver
+appeared in
+.Ox 2.6 .
diff --git a/static/openbsd/man4/man4.hppa/gsckbc.4 b/static/openbsd/man4/man4.hppa/gsckbc.4
new file mode 100644
index 00000000..9ba2a420
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/gsckbc.4
@@ -0,0 +1,52 @@
+.\" $OpenBSD: gsckbc.4,v 1.5 2008/07/16 16:32:08 miod Exp $
+.\"
+.\" Copyright (c) 2003, Miodrag Vallat.
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+.\" DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+.\" POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: July 16 2008 $
+.Dt GSCKBC 4 hppa
+.Os
+.Sh NAME
+.Nm gsckbc
+.Nd PS/2-like controller driver
+.Sh SYNOPSIS
+.Cd "gsckbc* at gsc? irq 26"
+.Cd "pckbd*  at gsckbc?"
+.Cd "pms*    at gsckbc?"
+.Sh DESCRIPTION
+The
+.Nm
+driver handles resource allocation and device attachment for the
+PS/2 input device ports.
+Each
+.Nm
+driver provides the logical connection for one child device, either the
+.Dq keyboard
+port or the
+.Dq mouse
+port.
+.Sh SEE ALSO
+.Xr gsc 4 ,
+.Xr pckbd 4 ,
+.Xr pms 4
diff --git a/static/openbsd/man4/man4.hppa/harmony.4 b/static/openbsd/man4/man4.hppa/harmony.4
new file mode 100644
index 00000000..b7ccaac8
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/harmony.4
@@ -0,0 +1,89 @@
+.\"     $OpenBSD: harmony.4,v 1.9 2007/05/31 19:19:54 jmc Exp $
+.\"
+.\"
+.\" Copyright (c) 2003 Jason L. Wright (jason@thought.net)
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+.\" DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+.\" POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: May 31 2007 $
+.Dt HARMONY 4 hppa
+.Os
+.Sh NAME
+.Nm harmony
+.Nd CS4215/AD1849 audio device
+.Sh SYNOPSIS
+.Cd "harmony* at gsc? irq 13"
+.Cd "audio*  at harmony?"
+.Sh DESCRIPTION
+The
+.Nm
+device uses the
+.Tn Crystal Semiconductor
+.Tn CS4215
+16-Bit Multimedia Audio Codec
+or
+.Tn Analog Devices
+.Tn AD1849
+.Tn SoundPort(R) Stereo Codec
+chip to implement the audio device interface described in
+.Xr audio 4 .
+This device is found on most
+.Tn HP PA-RISC
+workstations.
+The
+.Nm
+has a maximum precision of 16 bits and has a stereo input and stereo output.
+.Pp
+On
+.Tn HP 9000/712
+models
+.Nm
+also provides two additional channels for an add-on
+card with two fax/voice modems.
+.Pp
+One of the hardware registers reflects the state of the
+.Tn CHI
+bus that is used to communicate with the codec and thus
+being sampled at a low accuracy secondary frequency
+(such as
+.Xr timeout 9 )
+produces poor quality random bit stream that is fed into the
+entropy pool of
+.Xr random 4 .
+.Sh SEE ALSO
+.Xr ioctl 2 ,
+.Xr audio 4 ,
+.Xr gsc 4 ,
+.Xr intro 4 ,
+.Xr random 4
+.Sh HISTORY
+.Ox
+support for
+.Nm
+first appeared in
+.Ox 3.3 .
+.Sh CAVEATS
+To trigger entropy collection
+.Tn CHI
+bus has to be programmed into the data mode that happens once
+a single buffer of data has been played or recorded.
diff --git a/static/openbsd/man4/man4.hppa/ie.4 b/static/openbsd/man4/man4.hppa/ie.4
new file mode 100644
index 00000000..2b90625b
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/ie.4
@@ -0,0 +1,90 @@
+.\"	$OpenBSD: ie.4,v 1.16 2007/05/31 19:19:54 jmc Exp $
+.\"
+.\" Copyright (c) 2003 Paul Weissmann
+.\" All rights reserved.
+.\"
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+.\" ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+.\" SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: May 31 2007 $
+.Dt IE 4 hppa
+.Os
+.Sh NAME
+.Nm ie
+.Nd Intel i82596 Ethernet device
+.Sh SYNOPSIS
+.Cd "ie0 at gsc? irq 8"
+.Sh DESCRIPTION
+The
+.Nm
+interface provides access to the 10 Mb/s
+.Tn Ethernet
+network via the
+.Tn Intel
+i82596 DX/CA 32-bit
+Local Area Network Coprocessor for Ethernet.
+.Pp
+The i82596 comes basically in two different flavors:
+.Bl -tag -width i82596DXxxx
+.It i82596DX
+Systems with an ASP or WAX Main Bus Adapter (MBA), e.g. 720, 735 etc.
+These types of systems generally have only AUI or BNC and AUI connectors at
+the back.
+On the models with both you usually have to switch a big
+jumper-block on the mainboard to choose which one to activate.
+.It i82596CA
+Systems with LASI MBA, e.g. 712/*, 715/100 have the i82596CA
+integrated on the LASI macrochip.
+They usually have TP and AUI
+connectors and autodetect to which one the network is connected to.
+.El
+.Pp
+By default, the system will select the media type automatically, but the
+.Xr ifconfig 8
+command can be used to force the media selection.
+The media types are shown below:
+.Bl -tag -width "media autoselect" -offset indent
+.It media autoselect
+Attempt to autoselect the media type (default)
+.It media 10base5
+Use the AUI connector
+.It media 10baseT
+Use the twisted pair connector
+.It media 10base2
+Use the BNC connector
+.El
+.Sh SEE ALSO
+.Xr arp 4 ,
+.Xr ifmedia 4 ,
+.Xr inet 4 ,
+.Xr intro 4 ,
+.Xr io 4 ,
+.Xr hostname.if 5 ,
+.Xr ifconfig 8
+.Rs
+.%T 82596DX AND 82596SX High-Performance 32-bit Local Area Network Coprocessor
+.%Q Intel
+.Re
+.Rs
+.%T 82596CA High-Performance 32-bit Local Area Network Coprocessor
+.%Q Intel
+.Re
diff --git a/static/openbsd/man4/man4.hppa/intro.4 b/static/openbsd/man4/man4.hppa/intro.4
new file mode 100644
index 00000000..17d5a2c3
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/intro.4
@@ -0,0 +1,228 @@
+.\" $OpenBSD: intro.4,v 1.25 2022/03/31 17:27:21 naddy Exp $
+.\"
+.\" Copyright (c) 2002,2003 Paul Weissmann
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.\" Copyright (c) 1983, 1986, 1991 Regents of the University of California.
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\" 3. Neither the name of the University nor the names of its contributors
+.\"    may be used to endorse or promote products derived from this software
+.\"    without specific prior written permission.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+.\" ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+.\" SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: March 31 2022 $
+.Dt INTRO 4 hppa
+.Os
+.Sh NAME
+.Nm intro
+.Nd introduction to special files and hardware support
+.Sh DESCRIPTION
+This section describes the special files, related driver functions,
+and networking support available in the system.
+In this part of the manual,
+the SYNOPSIS section of each configurable device gives a sample specification
+for use in constructing a system description for the
+.Xr config 8
+program.
+The DIAGNOSTICS section lists messages which may appear on the console
+and/or in the system error log
+.Pa /var/log/messages
+due to errors in device operation; see
+.Xr syslogd 8
+for more information.
+.Pp
+This section contains both devices which may be configured into the system
+and network related information.
+The networking support is introduced in
+.Xr netintro 4 .
+.Sh DEVICE SUPPORT
+This section describes the hardware supported on the
+.Tn HP PA-RISC
+platform.
+Software support for these devices comes in two forms.
+A hardware device may be supported with a character or block
+.Em device driver ,
+or it may be used within the networking subsystem and have a
+.Em network interface driver .
+Character and block devices are accessed through files in the file
+system of a special type; see
+.Xr mknod 8 .
+Network interfaces are indirectly accessed through the interprocess
+communication facilities provided by the system; see
+.Xr socket 2 .
+.Pp
+A hardware device is identified to the system at configuration time
+and the appropriate device or network interface driver is then compiled
+into the system.
+When the resultant system is booted, the autoconfiguration facilities
+in the system probe for the device and, if found,
+enable the software support for it.
+If a device does not respond at autoconfiguration
+time, it is not accessible at any time afterwards.
+To enable a device which did not autoconfigure, the system must be rebooted.
+.Pp
+The autoconfiguration system is described in
+.Xr autoconf 4 .
+.Sh SUPPORTED SYSTEMS
+A list of
+.Tn HP 9000/700
+models targeted for support is listed below, including basic
+system characteristics.
+.Bl -column "J210XC" "200" "7300LC" "64/64(+1MB)" "Expansion" -offset left
+.It Sy "Model" Ta Sy "MHz" Ta Sy "CPU" Ta Sy "Caches, KB" Ta Sy "Expansion"
+.It "705" Ta "35" Ta "7000" Ta "32/64" Ta "N/A"
+.It "710" Ta "50" Ta "7000" Ta "32/64" Ta "N/A"
+.It "720" Ta "50" Ta "7000" Ta "128/256" Ta "EISA, GSC"
+.It "730" Ta "66" Ta "7000" Ta "128/256" Ta "EISA, GSC"
+.It "750" Ta "66" Ta "7000" Ta "256/256" Ta "4 EISA, 2 SGC"
+.It "715" Ta "33" Ta "7100" Ta "64/64" Ta "EISA/SGC"
+.It "715" Ta "50" Ta "7100" Ta "64/64" Ta "EISA/SGC"
+.It "715" Ta "75" Ta "7100" Ta "256/256" Ta "EISA/SGC"
+.It "725" Ta "50" Ta "7100" Ta "64/64" Ta "3 EISA, EISA/SGC"
+.It "725" Ta "75" Ta "7100" Ta "256/256" Ta "3 EISA, EISA/SGC"
+.It "735" Ta "100" Ta "7100" Ta "256/256" Ta "EISA, SGC"
+.It "742i" Ta "50" Ta "7100" Ta "64/64" Ta "N/A"
+.It "745i" Ta "50" Ta "7100" Ta "64/64" Ta "4 EISA"
+.It "745i" Ta "100" Ta "7100" Ta "256/256" Ta "4 EISA"
+.It "747i" Ta "50" Ta "7100" Ta "64/64" Ta "2 EISA, SGC, 6 VME"
+.It "747i" Ta "100" Ta "7100" Ta "256/256" Ta "2 EISA, SGC, 6 VME"
+.It "755" Ta "100" Ta "7100" Ta "256/256" Ta "4 EISA, 2 SGC"
+.It "735" Ta "125" Ta "7150" Ta "256/256" Ta "EISA, SGC"
+.It "755" Ta "125" Ta "7150" Ta "256/256" Ta "4 EISA, 2 SGC"
+.It "712" Ta "60" Ta "7100LC" Ta "32/32" Ta "GIO, TSIO"
+.It "712" Ta "80" Ta "7100LC" Ta "128/128" Ta "GIO, TSIO"
+.It "712" Ta "100" Ta "7100LC" Ta "128/128" Ta "GIO, TSIO"
+.It "715" Ta "64" Ta "7100LC" Ta "128/128" Ta "EISA/GSC"
+.It "715" Ta "80" Ta "7100LC" Ta "128/128" Ta "EISA/GSC"
+.It "715" Ta "100" Ta "7100LC" Ta "128/128" Ta "EISA/GSC"
+.It "715XC" Ta "100" Ta "7100LC" Ta "512/512" Ta "EISA/GSC"
+.It "725" Ta "64" Ta "7100LC" Ta "128/128" Ta "EISA, 3 EISA/GSC"
+.It "725" Ta "100" Ta "7100LC" Ta "128/128" Ta "EISA, 3 EISA/GSC"
+.It "743i" Ta "64" Ta "7100LC" Ta "128/128" Ta "2 GSC-M/2(4), VME"
+.It "743i" Ta "100" Ta "7100LC" Ta "128/128" Ta "2 GSC-M/2(4), VME"
+.It "748i" Ta "64" Ta "7100LC" Ta "128/128" Ta "2 GSC-M/2(4), 4 EISA/PCI, 6 VME"
+.It "748i" Ta "100" Ta "7100LC" Ta "128/128" Ta "2 GSC-M/2(4), 4 EISA/PCI, 6 VME"
+.It "SAIC" Ta "60" Ta "7100LC" Ta "32/32" Ta "GIO, TSIO, 2 PCMCIA"
+.It "SAIC" Ta "80" Ta "7100LC" Ta "128/128" Ta "GIO, TSIO, 2 PCMCIA"
+.It "J200" Ta "100" Ta "7200" Ta "256/256" Ta "GSC, 2 EISA, 2 EISA/GSC"
+.It "J210" Ta "120" Ta "7200" Ta "256/256" Ta "GSC, 2 EISA, 2 EISA/GSC"
+.It "J210XC" Ta "120" Ta "7200" Ta "1MB/1MB" Ta "GSC, 2 EISA, 2 EISA/GSC"
+.It "C100" Ta "100" Ta "7200" Ta "256/256" Ta "GSC, 3 EISA/GSC"
+.It "C110" Ta "120" Ta "7200" Ta "256/256" Ta "GSC, 3 EISA/GSC"
+.It "744" Ta "132" Ta "7300LC" Ta "64/64" Ta "2 GSC-M/2(4), VME"
+.It "744" Ta "165" Ta "7300LC" Ta "64/64+512" Ta "2 GSC-M/2(4), VME"
+.It "745" Ta "132" Ta "7300LC" Ta "64/64" Ta "2 GSC-M/2(4), 4 EISA/PCI"
+.It "745" Ta "165" Ta "7300LC" Ta "64/64+512" Ta "2 GSC-M/2(4), 4 EISA/PCI"
+.It "748" Ta "132" Ta "7300LC" Ta "64/64" Ta "2 GSC-M/2(4), 4 EISA/PCI, 6 VME"
+.It "748" Ta "165" Ta "7300LC" Ta "64/64+512" Ta "2 GSC-M/2(4), 4 EISA/PCI, 6 VME"
+.It "A180" Ta "180" Ta "7300LC" Ta "64/64" Ta "2 HSC/PCI"
+.It "A180C" Ta "180" Ta "7300LC" Ta "64/64+1MB" Ta "2 HSC/PCI"
+.It "B132L" Ta "132" Ta "7300LC" Ta "64/64(+1MB)" Ta "GSC/PCI, GSC/PCI/EISA"
+.It "B132L+" Ta "132" Ta "7300LC" Ta "64/64(+1MB)" Ta "GSC/PCI, GSC/PCI/EISA"
+.It "B160L" Ta "160" Ta "7300LC" Ta "64/64(+1MB)" Ta "GSC/PCI, GSC/PCI/EISA"
+.It "B180L+" Ta "180" Ta "7300LC" Ta "64/64(+1MB)" Ta "GSC/PCI, GSC/PCI/EISA"
+.It "C132L" Ta "132" Ta "7300LC" Ta "64/64(+1MB)" Ta "2 GSC/PCI/EISA, 2 GSC/EISA"
+.It "C160L" Ta "160" Ta "7300LC" Ta "64/64(+1MB)" Ta "2 GSC/PCI/EISA, 2 GSC/EISA"
+.It "RDI" Ta "132" Ta "7300LC" Ta "64/64(+1MB)" Ta "2 CardBus"
+.It "RDI" Ta "160" Ta "7300LC" Ta "64/64(+1MB)" Ta "2 CardBus"
+.It "RDI"  Ta "180" Ta "7300LC" Ta "64/64(+1MB)" Ta "2 CardBus"
+.It "C160" Ta "160" Ta "8000" Ta "512/512" Ta "2 GSC/PCI/EISA, 2 GSC/EISA"
+.It "C180" Ta "180" Ta "8000" Ta "1024/1024" Ta "2 GSC/PCI/EISA, 2 GSC/EISA"
+.It "J280" Ta "180" Ta "8000" Ta "1024/1024" Ta "3 GSC/PCI, PCI, PCI/EISA"
+.It "J282" Ta "180" Ta "8000" Ta "1024/1024" Ta "3 GSC/PCI, PCI, PCI/EISA"
+.It "C200" Ta "200" Ta "8200" Ta "512/1024" Ta "GSC/PCI/EISA, 3 GSC/PCI"
+.It "C240" Ta "240" Ta "8200" Ta "2048/2048" Ta "GSC/PCI/EISA, 3 GSC/PCI"
+.It "J2240" Ta "240" Ta "8200" Ta "2048/2048" Ta "3 GSC/PCI, PCI, PCI/EISA"
+.It "B1000" Ta "300" Ta "8500" Ta "512/1024" Ta "6 PCI"
+.It "C360" Ta "360" Ta "8500" Ta "512/1024" Ta "GSC/PCI/EISA, 3 GSC/PCI"
+.It "B2000" Ta "400" Ta "8500" Ta "512/1024" Ta "4 PCI"
+.It "C3000" Ta "400" Ta "8500" Ta "512/1024" Ta "6 PCI"
+.It "J5000" Ta "440" Ta "8500" Ta "512/1024" Ta "7 PCI"
+.It "J7000" Ta "440" Ta "8500" Ta "512/1024" Ta "7 PCI"
+.It "B2600" Ta "500" Ta "8600" Ta "512/1024" Ta "4 PCI"
+.It "C3600" Ta "552" Ta "8600" Ta "512/1024" Ta "6 PCI"
+.It "J5600" Ta "552" Ta "8600" Ta "512/1024" Ta "7 PCI"
+.It "J6000" Ta "552" Ta "8600" Ta "512/1024" Ta "7 PCI"
+.It "J7600" Ta "552" Ta "8600" Ta "512/1024" Ta "7 PCI"
+.It "C3650" Ta "625" Ta "8700" Ta "768/1536" Ta "6 PCI"
+.It "C3700" Ta "750" Ta "8700" Ta "768/1536" Ta "6 PCI"
+.It "J6700" Ta "750" Ta "8700" Ta "768/1536" Ta "3 PCI"
+.It "C3750" Ta "875" Ta "8700+" Ta "768/1536" Ta "6 PCI"
+.It "J6750" Ta "875" Ta "8700+" Ta "768/1536" Ta "3 PCI"
+.El
+.Sh LIST OF DEVICES
+A complete list of available devices is contained within the pages
+describing the system buses and controllers.
+For example, a PCI device would be listed in the
+.Xr pci 4
+man page.
+The following buses and controllers list these devices:
+.Pp
+.Bl -tag -width "cardbus(4)XX" -offset ind -compact
+.It Xr cardbus 4
+introduction to CardBus support
+.It Xr gsc 4
+introduction to HP 9000/700 GSC bus support
+.It Xr hil 4
+introduction to HP-HIL support
+.It Xr onewire 4
+1-Wire bus
+.It Xr pci 4
+introduction to PCI bus support
+.It Xr pcmcia 4
+introduction to PCMCIA (PC Card) support
+.It Xr usb 4
+introduction to Universal Serial Bus support
+.El
+.Sh SEE ALSO
+.Xr autoconf 4 ,
+.Xr cpu 4 ,
+.Xr io 4 ,
+.Xr runway 4 ,
+.Xr config 8
+.Sh HISTORY
+The
+hppa
+.Nm
+first appeared with
+.Ox 3.1 .
diff --git a/static/openbsd/man4/man4.hppa/io.4 b/static/openbsd/man4/man4.hppa/io.4
new file mode 100644
index 00000000..dc91f2f2
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/io.4
@@ -0,0 +1,166 @@
+.\" $OpenBSD: io.4,v 1.15 2011/09/03 22:59:07 jmc Exp $
+.\"
+.\" Copyright (c) 2003,2004 Paul Weissmann
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.\"
+.Dd $Mdocdate: September 3 2011 $
+.Dt IO 4 hppa
+.Os
+.Sh NAME
+.Nm io
+.Nd HP PA-RISC I/O subsystem reference
+.Sh DESCRIPTION
+The following table lists the
+.Tn PA-RISC
+I/O subsystems and connected devices found in the supported
+.Tn HP 9000/700
+machines.
+.Bl -column "715/100" "DLUW" "SE, FWD" "DX, FDDI" "[GSC/PCI]" "Misc" -offset 6n
+.It Sy Model Ta Sy MBA Ta Sy SCSI Ta Sy Network Ta Sy Video Ta Sy Misc
+.It "705" Ta "A" Ta "SE" Ta "DX" Ta "Timber" Ta ""
+.It "710" Ta "A" Ta "SE" Ta "DX" Ta "Timber" Ta ""
+.It "712" Ta "LW" Ta "SE" Ta "CA, TR" Ta "Artist" Ta ""
+.It "715/33" Ta "A" Ta "SE" Ta "DX" Ta "Stinger" Ta ""
+.It "715/50" Ta "A" Ta "SE" Ta "DX" Ta "Stinger" Ta ""
+.It "715/64" Ta "LW" Ta "SE" Ta "CA" Ta "Artist" Ta ""
+.It "715/75" Ta "A" Ta "SE" Ta "DX" Ta "Stinger" Ta ""
+.It "715/80" Ta "LW" Ta "SE" Ta "CA" Ta "Artist" Ta ""
+.It "715/100" Ta "LW" Ta "SE" Ta "CA" Ta "Artist" Ta ""
+.It "720" Ta "A" Ta "SE" Ta "DX" Ta "[SGC]" Ta ""
+.It "725/50" Ta "A" Ta "SE" Ta "DX" Ta "Stinger" Ta ""
+.It "725/75" Ta "A" Ta "SE" Ta "DX" Ta "Stinger" Ta ""
+.It "725/64" Ta "LW" Ta "SE" Ta "CA" Ta "Artist" Ta ""
+.It "725/100" Ta "LW" Ta "SE" Ta "CA" Ta "Artist" Ta ""
+.It "730" Ta "A" Ta "SE" Ta "DX" Ta "[SGC]" Ta ""
+.It "735" Ta "A" Ta "SE, FWD" Ta "DX, FDDI" Ta "[SGC]" Ta ""
+.It "742i" Ta "A" Ta "SE" Ta "CA" Ta "Stinger" Ta "VME"
+.It "743i" Ta "DLW" Ta "SE" Ta "DX" Ta "Artist" Ta "VME"
+.It "744" Ta "DLW" Ta "SE" Ta "DX" Ta "EG" Ta "VME"
+.It "745" Ta "DLW" Ta "SE" Ta "DX" Ta "EG" Ta "VME"
+.It "745i" Ta "A" Ta "SE" Ta "DX" Ta "Stinger" Ta ""
+.It "747i" Ta "A" Ta "SE" Ta "DX" Ta "Stinger" Ta ""
+.It "748" Ta "DLW" Ta "SE" Ta "DX" Ta "EG" Ta "VME"
+.It "748i" Ta "DLW" Ta "SE" Ta "DX" Ta "Artist" Ta "VME"
+.It "750" Ta "A" Ta "SE" Ta "DX" Ta "[SGC]" Ta ""
+.It "755" Ta "A" Ta "SE, FWD" Ta "DX, FDDI" Ta "[SGC]" Ta ""
+.It "A180/C" Ta "DL" Ta "SE" Ta "DC" Ta "[GSC/PCI]" Ta ""
+.It "B132L" Ta "DLW" Ta "SE, FWD" Ta "CA" Ta "EG" Ta ""
+.It "B160L" Ta "DLW" Ta "SE, UW" Ta "DC" Ta "EG" Ta ""
+.It "B180L" Ta "DLW" Ta "SE, UW" Ta "DC" Ta "EG" Ta ""
+.It "C100" Ta "LUW" Ta "SE, FWD" Ta "CA" Ta "[GSC]" Ta ""
+.It "C110" Ta "LUW" Ta "SE, FWD" Ta "CA" Ta "[GSC]" Ta ""
+.It "C132L" Ta "DLUW" Ta "SE, UW" Ta "DC" Ta "EG" Ta ""
+.It "C160L" Ta "DLUW" Ta "SE, UW" Ta "DC" Ta "EG" Ta ""
+.It "C160" Ta "DLU" Ta "SE, UW" Ta "DC" Ta "[GSC/PCI]" Ta ""
+.It "C180L" Ta "DLUW" Ta "SE, UW" Ta "DC" Ta "EG" Ta ""
+.It "C180" Ta "DLU" Ta "SE, UW" Ta "DC" Ta "[GSC/PCI]" Ta ""
+.It "C200" Ta "DLU" Ta "SE, UW" Ta "DC" Ta "[GSC/PCI]" Ta ""
+.It "C230" Ta "DLU" Ta "SE, UW" Ta "DC" Ta "[GSC/PCI]" Ta ""
+.It "C240" Ta "DLU" Ta "SE, UW" Ta "DC" Ta "[GSC/PCI]" Ta ""
+.It "C360" Ta "DLU" Ta "SE, UW" Ta "DC" Ta "[GSC/PCI]" Ta ""
+.It "J200" Ta "LUW" Ta "SE, FWD" Ta "CA" Ta "[GSC]" Ta ""
+.It "J210/XC" Ta "LUW" Ta "SE, FWD" Ta "CA" Ta "[GSC]" Ta ""
+.It "J280" Ta "DLUW" Ta "SE, UW" Ta "DC" Ta "[GSC/PCI]" Ta ""
+.It "J282" Ta "DLUW" Ta "SE, UW" Ta "DC" Ta "[GSC/PCI]" Ta ""
+.It "J2240" Ta "DLUW" Ta "SE, UW" Ta "DC" Ta "[GSC/PCI]" Ta ""
+.It "RDI" Ta "DL" Ta "SE" Ta "CA" Ta "EG" Ta "CardBus"
+.It "SAIC" Ta "LW" Ta "SE" Ta "CA" Ta "Artist" Ta "PCMCIA"
+.El
+.Pp
+The MBA column denotes the bus adapters in use:
+.Pp
+.Bl -tag -width XXXX -compact -offset indent
+.It A
+.Xr asp 4
+.It D
+.Xr dino 4
+.It L
+.Xr lasi 4
+.It U
+.Xr uturn 4
+.It W
+.Xr wax 4
+.El
+.Pp
+The trailing characters in the SCSI row denote the
+SCSI bus configuration:
+.Pp
+.Bl -tag -width XXXX -compact -offset indent
+.It SE
+.Xr oosiop 4
+or
+.Xr osiop 4 ;
+.Tn Symbios/NCR
+53C700/710 8-bit (fast) single-ended,
+.It FWD
+.Xr siop 4 ;
+.Tn NCR53C720
+16-bit fast differential (HVD),
+.It UW
+.Xr siop 4 ;
+.Tn NCR53C875
+16-bit ultra single-ended.
+.El
+.Pp
+The trailing digits in the Network row denote the
+interface speed:
+.Pp
+.Bl -tag -width XXXXX -compact -offset indent
+.It CA
+.Xr ie 4 ;
+.Tn i82596CA
+10 Mb/s,
+.It DX
+.Xr ie 4 ;
+.Tn i82596DX
+10 Mb/s,
+.It DC
+.Xr dc 4 ;
+.Tn DEC 21142/3
+10/100 Mb/s,
+.It FDDI
+.Tn Am78830
+Formac+ FDDI.
+.El
+.Sh SEE ALSO
+.Xr asp 4 ,
+.Xr dc 4 ,
+.Xr dino 4 ,
+.Xr gsc 4 ,
+.Xr ie 4 ,
+.Xr intro 4 ,
+.Xr lasi 4 ,
+.Xr oosiop 4 ,
+.Xr osiop 4 ,
+.Xr runway 4 ,
+.Xr siop 4 ,
+.Xr sti 4 ,
+.Xr uturn 4 ,
+.Xr wax 4
+.Sh HISTORY
+The
+hppa
+.Nm
+reference first appeared with
+.Ox 3.3 .
diff --git a/static/openbsd/man4/man4.hppa/lasi.4 b/static/openbsd/man4/man4.hppa/lasi.4
new file mode 100644
index 00000000..dca12ec0
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/lasi.4
@@ -0,0 +1,134 @@
+.\"	$OpenBSD: lasi.4,v 1.27 2018/06/18 06:06:52 jmc Exp $
+.\"
+.\"
+.\" Copyright (c) 1999 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: June 18 2018 $
+.Dt LASI 4 hppa
+.Os
+.Sh NAME
+.Nm lasi
+.Nd core bus controller and I/O subsystem as present on newer HP 9000/700 \
+workstations and single-board computers
+.Sh SYNOPSIS
+.Cd "lasi0   at mainbus? irq 28"
+.Cd "lasi0   at phantomas? irq 28"
+.Cd "lasi0   at uturn? irq 28"
+.Cd "gsc* at lasi?"
+.Sh DESCRIPTION
+The supported Core bus controllers are those used in conjunction with
+.Tn PA7100LC
+and
+.Tn PA7300LC
+CPUs and based upon LSI's macrochip that includes:
+.Pp
+.Bl -bullet -compact
+.It
+Core bus controller
+.It
+System clock
+.It
+Interrupt controller
+.It
+Real-time clock Interface
+.It
+Power system support
+.It
+RAM and Flash EEPROM controllers
+.It
+Two PS/2 ports
+.It
+RS-232 and Centronics I/O ports
+.It
+i82596CA LAN coprocessor
+.It
+NCR53c710 SCSI I/O processor
+.It
+Serial Interface for the CS4216 audio codec
+.It
+Interface for the WD37C65C floppy drive controller
+.It
+Optional telephone interface (two fax/voice modem channels)
+.El
+.Sh MACHINES
+An incomplete list of machines that use the
+.Tn LASI
+bus controller:
+.Pp
+.Bl -bullet -compact
+.It
+712/*
+.It
+715/{64/80/100}[XC]
+.It
+725/{64/80/100}
+.It
+743/*
+.It
+744/*
+.It
+745/*
+.It
+A180[C]
+.It
+B132L[+], B160L, B180L+
+.It
+C100, C110, J200, J210[XC]
+.It
+RDI PrecisionBook
+.It
+SAIC Galaxy 1100
+.El
+.Sh SEE ALSO
+.Xr asp 4 ,
+.Xr gsc 4 ,
+.Xr intro 4 ,
+.Xr io 4 ,
+.Xr phantomas 4 ,
+.Xr power 4 ,
+.Xr uturn 4 ,
+.Xr wax 4
+.Rs
+.%T "Precision I/O Architecture Reference Specification"
+.%Q Hewlett-Packard
+.Re
+.Rs
+.%T "712 I/O Subsystem ERS"
+.%N Revision 1.1
+.%D 12 February 1993
+.%Q Hewlett-Packard
+.%O Dwg No. A-A2263-66510-31
+.Re
+.Rs
+.%J Hewlett-Packard Journal
+.%D April 1995
+.%V Volume 46
+.%N Number 2
+.Re
+.Sh HISTORY
+The
+.Nm
+driver
+appeared in
+.Ox 2.4 .
diff --git a/static/openbsd/man4/man4.hppa/lcd.4 b/static/openbsd/man4/man4.hppa/lcd.4
new file mode 100644
index 00000000..1c42bc95
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/lcd.4
@@ -0,0 +1,44 @@
+.\"	$OpenBSD: lcd.4,v 1.3 2018/01/12 04:36:44 deraadt Exp $
+.\"
+.\" Copyright (c) 2007 Mark Kettenis <kettenis@openbsd.org>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate: January 12 2018 $
+.Dt LCD 4 hppa
+.Os
+.Sh NAME
+.Nm lcd
+.Nd front panel LCD display
+.Sh SYNOPSIS
+.Cd "lcd0 at mainbus0"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the front panel LCD display found on newer
+HP PA-RISC workstations and servers.
+This LCD can be made to show a heartbeat based on the load average by
+setting the
+.Xr sysctl 2
+variable
+.Ar machdep.led_blink
+to a non-zero value.
+.Sh SEE ALSO
+.Xr sysctl 2 ,
+.Xr intro 4 ,
+.Xr sysctl 8
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 4.2 .
diff --git a/static/openbsd/man4/man4.hppa/mem.4 b/static/openbsd/man4/man4.hppa/mem.4
new file mode 100644
index 00000000..44ab580d
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/mem.4
@@ -0,0 +1,87 @@
+.\"	$OpenBSD: mem.4,v 1.4 2018/01/12 04:36:44 deraadt Exp $
+.\"
+.\" Copyright (c) 2004, Miodrag Vallat.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+.\" DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+.\" POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: January 12 2018 $
+.Dt MEM 4 hppa
+.Os
+.Sh NAME
+.Nm mem ,
+.Nm kmem
+.Nd memory files and memory controller
+.Sh SYNOPSIS
+.Cd "mem* at mainbus0 flags 0x0000"
+.Sh DESCRIPTION
+The
+.Nm
+driver controls and restricts access to the systems memory
+by the hardware buses and the processor.
+.Pp
+It also provides an interface to userland through the special files
+.Pa /dev/mem
+and
+.Pa /dev/kmem .
+Physical memory is accessed through
+.Pa /dev/mem ,
+while kernel virtual memory is accessed through
+.Pa /dev/kmem .
+Access to kernel virtual addresses not currently mapped to memory will fail.
+On hppa, the physical memory range is always contiguous and starts at
+address 0; kernel virtual memory begins at address 0 as well.
+.Pp
+Even with sufficient file system permissions,
+these devices can only be opened when the
+.Xr securelevel 7
+is insecure or when the
+.Va kern.allowkmem
+.Xr sysctl 2
+variable is set.
+.Sh FILES
+.Bl -tag -width /dev/kmem -compact
+.It Pa /dev/mem
+.It Pa /dev/kmem
+.El
+.Sh SEE ALSO
+.Xr securelevel 7
+.Sh CAVEATS
+On some systems featuring a
+.Dq Viper
+memory controller,
+.Ox
+may not configure bus arbitration correctly, causing the boot process
+to freeze during either
+.Nm
+or
+.Xr cpu 4
+device probe.
+.Pp
+In this case, a different initialization strategy can be achieved by
+setting
+.Ar flags
+to 0x0001
+.Po
+see
+.Xr boot_config 8
+for details
+.Pc .
diff --git a/static/openbsd/man4/man4.hppa/mongoose.4 b/static/openbsd/man4/man4.hppa/mongoose.4
new file mode 100644
index 00000000..4693ae1d
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/mongoose.4
@@ -0,0 +1,56 @@
+.\"	$OpenBSD: mongoose.4,v 1.4 2007/05/31 19:19:54 jmc Exp $
+.\"
+.\" Copyright (c) 2004 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND,
+.\" USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: May 31 2007 $
+.Dt MONGOOSE 4 hppa
+.Os
+.Sh NAME
+.Nm mongoose
+.Nd EISA Bus adapter
+.Sh SYNOPSIS
+.Cd "mongoose0 at mainbus?"
+.Cd "eisa* at mongoose?"
+.Sh DESCRIPTION
+Provides an interface from the CPU-memory bus to EISA and ISA
+devices.
+Two variations exist providing the same functionality
+based on
+.Tn Intel i82350
+or
+.Tn Texas Instruments
+.\" TACT84544BPC/FBW41962 TACT84543BPP/36AEKJW TACT84541CPC/FCW421B3
+chips.
+Depending on the model the bus clock is either 25 MHz or 33 MHz.
+.Sh SEE ALSO
+.Xr eisa 4 ,
+.Xr intro 4
+.Sh HISTORY
+The
+.Nm
+driver
+appeared in
+.Ox 2.6 .
+.Sh BUGS
+Has some.
diff --git a/static/openbsd/man4/man4.hppa/pdc.4 b/static/openbsd/man4/man4.hppa/pdc.4
new file mode 100644
index 00000000..4364be8a
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/pdc.4
@@ -0,0 +1,732 @@
+.\" $OpenBSD: pdc.4,v 1.12 2022/03/31 17:27:21 naddy Exp $
+.\"
+.\" Copyright (c) 2004 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
+.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+.\" SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+.\" IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+.\" THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: March 31 2022 $
+.Dt PDC 4 hppa
+.Os
+.Sh NAME
+.Nm pdc
+.Nd Processor-Dependent Code firmware driver
+.Sh SYNOPSIS
+.Cd "pdc0 at mainbus?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides system console services through the PDC
+and also a means for calling PDC procedures, described later.
+The PDC console is used early in the kernel startup before enough kernel
+subsystems have been initialized to directly use the hardware
+i.e. serial ports, keyboard, and video.
+.Pp
+The PDC version displayed at system boot is relevant to the particular
+system model and is not necessarily comparable to PDC versions
+on other systems.
+.\" TODO page0 description and entry points
+.Sh PDC PROCEDURES
+PDC procedure calls are all made through a single entry point
+and assume normal C language calling conventions, with option
+number in the first argument and the return data address in the
+second, unless indicated otherwise.
+Each call requires at most 7KB of the available stack.
+Here is the list of procedures and options descriptions:
+.Bl -tag -width pdc
+.It Fn pdc "PDC_ADD_VALID" "PDC_ADD_VALID_DFLT" "paddr"
+Perform a read operation attempt at the physical address
+.Ar paddr
+without causing a HPMC, in order to verify that the address is valid
+and there is a device to respond to it.
+The implementation may choose to call the caller's HPMC handler and
+raise error conditions on the bus converters.
+.It Fn pdc "PDC_ALLOC" "PDC_ALLOC_DFLT" "ptr" "size"
+Allocate static storage for IODC use of
+.Ar size
+bytes and return the address in a word pointed to by the
+.Ar ptr
+argument.
+There is no way of freeing the storage allocated and thus
+care shall be taken to not exhaust the total allocation limit of 32KB.
+.It Fn pdc "PDC_BLOCK_TLB" "PDC_BTLB_DEFAULT" "ptr"
+Get block TLB parameters into the data area pointed to by the
+.Ar ptr
+argument.
+This includes minimal and maximal entry size and number of fixed and
+variable sized entries in the block TLB.
+Fixed entries have size of power of two and are aligned to the size
+where variable entries can have any size and base address both
+aligned to a page.
+.It Xo
+.Fo pdc
+.Fa PDC_BLOCK_TLB
+.Fa PDC_BTLB_INSERT
+.Fa sp
+.Fa va
+.Fa pa
+.Fa len
+.Fa acc
+.Fa slot
+.Fc
+.Xc
+Insert block TLB entry specified by the space ID
+.Ar sp ,
+virtual address
+.Ar va ,
+physical address
+.Ar pa ,
+region length
+.Ar len ,
+access rights
+.Ar acc ,
+into the slot number
+.Ar slot .
+.It Fn pdc "PDC_BLOCK_TLB" "PDC_BTLB_PURGE" "sp" "va" "slot" "len"
+Purge one entry from the block TLB specified by the space ID
+.Ar sp ,
+virtual address
+.Ar va ,
+region length
+.Ar len ,
+from slot number
+.Ar slot .
+.It Fn pdc "PDC_BLOCK_TLB" "PDC_BTLB_PURGE_ALL"
+Purge all entries from the block TLB.
+.\" TODO .It Fn pdc "PDC_BUS_BAD" "PDC_BUS_BAD_DLFT"
+.It Fn pdc "PDC_CACHE" "PDC_CACHE_DFLT" "ptr"
+Retrieve cache and TLB configuration parameters into the data area
+pointed to by the
+.Ar ptr
+argument.
+The format of the data stores is as follows:
+.Bl -column "0x00" "contents" -offset indent
+.It Sy "addr" Ta Sy "contents"
+.It "0x00" Ta "I-cache size in bytes"
+.It "0x04" Ta "I-cache configuration"
+.It "0x08" Ta "I-cache base for flushing"
+.It "0x0c" Ta "I-cache stride for flushing"
+.It "0x10" Ta "I-cache count for flushing"
+.It "0x14" Ta "I-cache loop size for flushing"
+.It "0x18" Ta "D-cache size in bytes"
+.It "0x1c" Ta "D-cache configuration"
+.It "0x20" Ta "D-cache base for flushing"
+.It "0x24" Ta "D-cache stride for flushing"
+.It "0x28" Ta "D-cache count for flushing"
+.It "0x2c" Ta "D-cache loop size for flushing"
+.It "0x30" Ta "ITLB size"
+.It "0x34" Ta "ITLB configuration"
+.It "0x38" Ta "ITLB space base for flushing"
+.It "0x3c" Ta "ITLB space stride for flushing"
+.It "0x40" Ta "ITLB space count for flushing"
+.It "0x44" Ta "ITLB address base for flushing"
+.It "0x48" Ta "ITLB address stride for flushing"
+.It "0x4c" Ta "ITLB address count for flushing"
+.It "0x50" Ta "ITLB loop size for flushing"
+.It "0x54" Ta "DTLB size"
+.It "0x58" Ta "DTLB configuration"
+.It "0x5c" Ta "DTLB space base for flushing"
+.It "0x60" Ta "DTLB space stride for flushing"
+.It "0x64" Ta "DTLB space count for flushing"
+.It "0x68" Ta "DTLB address base for flushing"
+.It "0x6c" Ta "DTLB address stride for flushing"
+.It "0x70" Ta "DTLB address count for flushing"
+.It "0x74" Ta "DTLB loop size for flushing"
+.El
+.Pp
+The cache configuration word is formatted as follows:
+.Bl -column "bit" "len" "contents" -offset indent
+.It Sy "bit" Ta Sy "len" Ta Sy "contents"
+.It "0" Ta "12" Ta "reserved"
+.It "13" Ta "3" Ta "set 1 if coherent operation supported"
+.It "16" Ta "2" Ta "flush mode: 0 \(em fdc & fic; 1 \(em fdc;\
+ 2 \(em fic; 3 \(em either"
+.It "18" Ta "1" Ta "write-thru D-cache if set"
+.It "19" Ta "2" Ta "reserved"
+.It "21" Ta "3" Ta "cache line size"
+.It "24" Ta "4" Ta "associativity"
+.It "28" Ta "4" Ta "virtual address alias boundary"
+.El
+.It Fn pdc "PDC_CACHE" "PDC_CACHE_SETCS" "ptr" "i_cst" "d_cst" "it_cst" "dt_cst"
+The second word in each of the
+.Ar i_cst ,
+.Ar d_cst ,
+.Ar it_cst ,
+and
+.Ar dt_cst
+arguments specifies the desired coherency operation for the instructions cache,
+data cache, instructions TLB, and data TLB, respectively.
+The data area pointed to by the
+.Ar ptr
+argument receives the actual coherent operation state
+after an attempted change.
+The CPU does not support the requested operation change
+should the corresponding words not match the arguments upon return.
+The currently supported values are zero for incoherent operation,
+and one for coherent operation.
+.It Fn pdc "PDC_CACHE" "PDC_CACHE_GETSPIDB" "ptr"
+The word pointed to by the
+.Ar ptr
+argument receives a mask of space ID used in hashing for cache tag.
+.It Fn pdc "PDC_CHASSIS" "PDC_CHASSIS_DISP" "display"
+Update the chassis display with data given in the
+.Ar display
+argument.
+The bitfields in the word are as follows:
+.Pp
+.Bl -tag -width 0xfffff -compact
+.It 0xe0000
+Specifies the system state.
+.Bl -tag -width 0xfffff -compact
+.It 0x00000
+off
+.It 0x20000
+fault
+.It 0x40000
+test
+.It 0x60000
+initialize
+.It 0x80000
+shutdown
+.It 0xa0000
+warning
+.It 0xc0000
+run
+.It 0xe0000
+all on
+.El
+.It 0x10000
+Blank the chassis display.
+.It 0x0f000
+This and the other lower three nibbles specify the four hex digits
+to be displayed on the chassis display.
+.El
+.It Fn pdc "PDC_CHASSIS" "PDC_CHASSIS_WARN" "ptr"
+Return the warnings from the chassis fans, temperature sensors,
+batteries and power supplies.
+A word of data is returned in the area pointed by the
+.Ar ptr
+argument and is described with bitfields:
+.Pp
+.Bl -tag -width 0xff -compact
+.It 0xff000000
+Zero means none of the redundant chassis components has indicated any failures.
+A non-zero value specifies the failing component.
+.It 0x4
+Indicates the chassis battery charge is low.
+.It 0x2
+The chassis temperature has exceeded the low threshold.
+.It 0x1
+The chassis temperature has exceeded the middle threshold.
+.El
+.It Fn pdc "PDC_CHASSIS" "PDC_CHASSIS_ALL" "ptr" "display"
+Both retrieves the chassis warnings into the word pointed by the
+.Ar ptr
+argument and sets the chassis display using data in the
+.Ar display
+argument.
+.\" TODO .It Fn pdc "PDC_CONF" "PDC_CONFIG_DECONF" "ptr" "hpa"
+.\" TODO .It Fn pdc "PDC_CONF" "PDC_CONFIG_RECONF" "ptr" "hpa"
+.\" TODO .It Fn pdc "PDC_CONF" "PDC_CONFIG_INFO" "ptr" "hpa"
+.It Fn pdc "PDC_COPROC" "PDC_COPROC_DFLT" "ptr"
+Identify the coprocessors attached to the CPU.
+The
+.Ar ptr
+points to a memory location where data is to be stored.
+The first word provides a mask for functional coprocessors and
+the second word is the mask for all present coprocessors.
+.It Fn pdc "PDC_DEBUG" "PDC_DEBUG_DFLT" "ptr"
+Retrieve address of the PDC debugger placed in to the word
+pointed to by the
+.Ar ptr
+argument.
+.\" TODO .It Fn pdc "PDC_INSTR" "PDC_INSTR_DFLT"
+.It Fn pdc "PDC_IODC" "PDC_IODC_READ" "ptr" "hpa" "entry" "addr" "count"
+Given a module
+.Ar hpa ,
+retrieve the specified
+.Ar entry
+from the module's IODC into a memory area at
+.Ar adr
+of
+.Ar count
+bytes long at most.
+The
+.Ar entry
+index is a one-byte index, with a value of zero being a special case.
+For the 0th entry, an IODC header of 16 bytes is returned instead
+of an actual code.
+.It Fn pdc "PDC_IODC" "PDC_IODC_NINIT" "ptr" "hpa" "spa"
+Non-destructively initialize the memory module specified by the
+.Ar hpa
+and
+.Ar spa
+arguments and return the module status after the init in the first word
+pointed to by the
+.Ar ptr
+argument, followed by the SPA space size and an amount of
+available memory bytes in the subsequent two words.
+.It Fn pdc "PDC_IODC" "PDC_IODC_DINIT" "ptr" "hpa" "spa"
+Same as
+.Nm PDC_IODC_NINIT
+except a destructive memory test is performed.
+.It Fn pdc "PDC_IODC" "PDC_IODC_MEMERR" "ptr" "hpa" "spa"
+For the memory module that is specified by
+.Ar hpa
+and
+.Ar spa ,
+return the last most severe error information comprised of copies of
+IO_STATUS, IO_ERR_RESP, IO_ERR_INFO, and IO_ERR_REQ registers placed
+into the data area pointed to by the
+.Ar ptr
+argument, and clear the error status.
+.It Fn pdc "PDC_IODC" "PDC_IODC_IMEMMASTER" "ptr" "hpa"
+HPA for the primary memory module is returned in a word pointed to by the
+.Ar ptr
+argument for a memory module specified by
+.Ar hpa
+if it's configured as a slave module in an interleave group.
+.It Fn pdc "PDC_LAN_STATION_ID" "PDC_LAN_STATION_ID_READ" "macptr" "hpa"
+Retrieve the MAC address for the device at
+.Ar hpa
+into the data area pointed to by the
+.Ar macptr
+argument.
+.\" TODO .It Fn pdc "PDC_MEM" "PDC_MEM_INFO" "ptr"
+.\" TODO .It Fn pdc "PDC_MEM" "PDC_MEM_ADD" "ptr" "PDT"
+.\" TODO .It Fn pdc "PDC_MEM" "PDC_MEM_CLR" "ptr"
+.\" TODO .It Fn pdc "PDC_MEM" "PDC_MEM_READ" "ptr" "PDT"
+.\" TODO .It Fn pdc "PDC_MEM" "PDC_MEM_RSTCLR" "ptr"
+.\" TODO .It Fn pdc "PDC_MEM" "PDC_MEM_SETGOOD" "ptr" "good"
+.It Fn pdc "PDC_MEMMAP" "PDC_MEMMAP_HPA." "ptr" "path"
+Returns device HPA in the word pointed to by the
+.Ar ptr
+argument given the device
+.Ar path
+pointer.
+.It Fn pdc "PDC_MODEL" "PDC_MODEL_INFO" "ptr"
+Returns the System model numbers.
+.It Fn pdc "PDC_MODEL" "PDC_MODEL_BOOTID" "boot_id"
+Set BOOT_ID of the processor module (used during boot
+process of monarch selection) to a word given in the
+.Ar boot_id
+argument.
+.It Fn pdc "PDC_MODEL" "PDC_MODEL_COMP" "ptr" "index"
+Retrieve processor component versions by issuing this procedure with
+subsequent indexes in the
+.Ar index
+argument starting at zero.
+The component version number is stored in the word pointed to by
+the
+.Ar ptr
+argument.
+.It Fn pdc "PDC_MODEL" "PDC_MODEL_MODEL" "ptr" "os_id" "mod_addr"
+Return a string of 80 chars maximum stored at address
+.Ar mod_addr
+and conforming to the OS specified by the
+.Ar os_id
+16-bit integer (see
+.Nm PDC_STABLE
+for more information on OS ID).
+A word at the
+.Ar ptr
+address receives the result string length.
+.\" TODO .It Fn pdc "PDC_MODEL" "PDC_MODEL_ENSPEC" "ptr"
+.\" TODO .It Fn pdc "PDC_MODEL" "PDC_MODEL_DISPEC" "ptr"
+.It Fn pdc "PDC_MODEL" "PDC_MODEL_CPUID" "ptr"
+Retrieve CPU model information.
+A word stored at the address given by the
+.Ar ptr
+argument specifies the CPU revision in the lower 5 bits followed by 7 bits
+of CPU model number.
+.It Fn pdc "PDC_MODEL" "PDC_MODEL_CPBALITIES" "ptr"
+Retrieve platform capabilities into the word pointed by the
+.Ar ptr
+argument.
+Bit 0 and 1 specify that a 64- or 32-bit OS is supported, respectively.
+.It Fn pdc "PDC_MODEL" "PDC_MODEL_GETBOOTOPTS" "ptr"
+Retrieve the currently enabled, overall supported, and enabled by default
+boot test masks respectively stored at location pointed to by
+the
+.Ar ptr
+argument.
+.It Fn pdc "PDC_MODEL" "PDC_MODEL_SETBOOTOPTS" "ptr" "disable" "enable"
+Disable boot tests specified by mask in the
+.Ar disable
+argument and enable
+boot tests specified by the mask given in the
+.Ar enable
+argument.
+The memory location pointed to by
+.Ar ptr
+will contain the resulting masks as returned
+by the PDC_MODEL_GETBOOTOPTS function.
+If an attempt is made to enable and disable the same test in one
+call, a PDC_ERR_INVAL will be returned.
+.It Fn pdc "PDC_NVM" "PDC_NVM_READ" "offset" "ptr" "count"
+Read contents of the NVM at
+.Ar offset
+into the memory area pointed to by the
+.Ar ptr
+argument of no more than
+.Ar count
+bytes.
+.Pp
+The format of the NVM is as follows:
+.Bl -column "0x0000" "size" "contents" -offset indent
+.It Sy "offset" Ta Sy "size" Ta Sy "contents"
+.It "0x00" Ta "0x24" Ta "HV dependent"
+.It "0x24" Ta "0x20" Ta "bootpath"
+.It "0x44" Ta "0x04" Ta "ISL revision"
+.It "0x48" Ta "0x04" Ta "timestamp"
+.It "0x4c" Ta "0x30" Ta "LIF utility entries"
+.It "0x7c" Ta "0x04" Ta "entry point"
+.It "0x80" Ta "0x80" Ta "OS panic information"
+.El
+.It Fn pdc "PDC_NVM" "PDC_NVM_WRITE" "offset" "ptr" "count"
+Write data pointed to by the
+.Ar ptr
+argument of
+.Ar count
+bytes at
+.Ar address
+in the NVM.
+.It Fn pdc "PDC_NVM" "PDC_NVM_SIZE" "ptr"
+Put the size of Non-Volatile Memory into the word pointed to by the
+.Ar ptr
+argument.
+.It Fn pdc "PDC_NVM" "PDC_NVM_VRFY"
+Verify that the contents of NVM are valid.
+.It Fn pdc "PDC_NVM" "PDC_NVM_INIT"
+Reset the contents of NVM to zeroes without any arguments.
+.It Fn pdc "PDC_HPA" "PDC_HPA_DFLT" "ptr"
+The data returned provides the monarch CPUs HPA in the word pointed to by
+.Ar ptr .
+.It Fn pdc "PDC_HPA" "PDC_HPA_MODULES" "ptr"
+Retrieve the bit mask for devices on the CPU bus into the data location
+pointed to by
+.Ar ptr .
+The first word is a bitmask for devices 0-31, and the second is
+a bitmask for devices 32-63, where bits set to one specify that
+the corresponding device number is on the same bus as the CPU.
+.\" TODO .It Fn pdc "PDC_PAT_IO" "PDC_PAT_IO_GET_PCI_RTSZ"
+.\" TODO .It Fn pdc "PDC_PAT_IO" "PDC_PAT_IO_GET_PCI_RT"
+.It Fn pdc "PDC_PIM" "PDC_PIM_HPMC" "offset" "ptr" "count"
+Get HPMC data from
+.Ar offset
+in Processor Internal Memory (PIM) into a
+.Ar ptr
+memory area of no more than
+.Ar count
+bytes in size.
+Data provided includes (in the order it is copied into the buffer):
+general registers (r0-r31), control registers (cr0-cr31), space
+registers (sr0-sr7), IIA space tail, IIA offset tail, check type,
+CPU state, cache check, TLB check, bus check, assist check, assist
+state, path info, system responder address, system requestor address,
+FPU registers (fpr0-fpr31).
+.It Fn pdc "PDC_PIM" "PDC_PIM_SIZE" "ptr"
+Return the amount of data available in bytes in the word pointed to by
+.Ar ptr .
+.It Fn pdc "PDC_PIM" "PDC_PIM_LPMC" "offset" "ptr" "count"
+Get LPMC data from
+.Ar offset
+in PIM into a
+.Ar ptr
+memory area of no more than
+.Ar count
+bytes in size.
+Data provided includes: HV dependent 0x4a words, check type, HV dependent
+word, cache check, TLB check, bus check, assist check, assist state,
+path info, system responder address, system requestor address,
+FPU registers (fpr0-fpr31).
+.It Fn pdc "PDC_PIM" "PDC_PIM_SBD" "offset" "ptr" "count"
+Get Soft Boot Data from
+.Ar offset
+in PIM into a
+.Ar ptr
+memory area of no more than
+.Ar count
+bytes in size.
+Data provided includes: general registers (r0-r31), control registers
+(cr0-cr31), space registers (sr0-sr7), IIA space tail, IIA offset tail,
+HV dependent word, CPU state.
+.It Fn pdc "PDC_PIM" "PDC_PIM_TOC" "offset" "ptr" "count"
+Get TOC (Transfer Of Control) data from
+.Ar offset
+in PIM into a
+.Ar ptr
+memory area of no more than
+.Ar count
+bytes in size.
+Data provided includes: general registers (r0-r31), control registers
+(cr0-cr31), space registers (sr0-sr7), IIA space tail, IIA offset tail,
+HV dependent word, CPU state.
+.It Fn pdc "PDC_POW_FAIL" "PDC_POW_FAIL_DFLT"
+Prepare for power fail.
+On the machines that provide power failure interrupts, this function is
+to be called after the operating system has completed
+.Xr shutdown 8
+to finish system-dependent tasks and power down.
+This function only requires 512 bytes of stack.
+.It Fn pdc "PDC_PROC" "PDC_PROC_STOP"
+Stop the currently executing processor and also disable bus requestorship,
+disable interrupts, and exclude the processor from cache coherency protocols.
+The caller must flush any necessary data from the cache before calling this
+function.
+.It Fn pdc "PDC_PROC" "PDC_PROC_RENDEZVOUS"
+Enter the reset rendezvous code on the current processor.
+This function is only implemented on category B processors and
+implementation is optional on category A processors.
+.It Fn pdc "PDC_PSW" "PDC_PSW_GETMASK" "ptr"
+Get the mask of default bits implemented into a word pointed to by the
+.Ar ptr
+argument.
+The following mask values are possible:
+.Pp
+.Bl -tag -width 100 -compact
+.It 1
+Default endianness bit is available.
+.It 2
+Default word width bit is available.
+.El
+.It Fn pdc "PDC_PSW" "PDC_PSW_DEFAULTS" "ptr"
+Retrieve the default PSW bits into the word pointed to by the
+.Ar ptr
+argument.
+.It Fn pdc "PDC_PSW" "PDC_PSW_SETDEFAULTS" "bits"
+Set the default PSW
+.Ar bits .
+.It Fn pdc "PDC_SOFT_POWER" "PDC_SOFT_POWER_INFO" "ptr"
+Retrieve
+.Dq power
+register address into the word pointed to by the
+.Ar ptr
+argument.
+Bit-0 in the
+.Dq power
+register address being set specifies the power button being depressed.
+No dampening is required, unlike with the
+.Xr lasi 4
+power circuit.
+.It Fn pdc "PDC_SOFT_POWER" "PDC_SOFT_POWER_ENABLE" "ptr" "stat"
+Enable (zero
+.Ar stat )
+or disable (non-zero
+.Ar stat )
+the soft power function,
+where disable means the machine will turn immediately off
+should the power get depressed.
+The
+.Ar ptr
+argument still points to the data provided previously
+by the PDC_SOFT_POWER_INFO call.
+.It Fn pdc "PDC_STABLE" "PDC_STABLE_READ" "offset" "ptr" "count"
+Read contents of the
+.Dq Stable Storage
+at
+.Ar offset
+into the memory area pointed to by the
+.Ar ptr
+argument of no more than
+.Ar count
+bytes.
+.Pp
+The format of the stable storage is as follows:
+.Bl -column "offset" "0x00" "contents" -offset indent
+.It Sy "offset" Ta Sy "size" Ta Sy "contents"
+.It "0x0000" Ta "0x20" Ta "primary bootpath"
+.It "0x0020" Ta "0x20" Ta "reserved"
+.It "0x0040" Ta "0x02" Ta "OS ID"
+.It "0x0042" Ta "0x16" Ta "OS dependent"
+.It "0x0058" Ta "0x02" Ta "diagnostic"
+.It "0x005a" Ta "0x03" Ta "reserved"
+.It "0x005d" Ta "0x02" Ta "OS dependent"
+.It "0x005f" Ta "0x01" Ta "fast size"
+.It "0x0060" Ta "0x20" Ta "console path"
+.It "0x0080" Ta "0x20" Ta "alternative boot path"
+.It "0x00a0" Ta "0x20" Ta "keyboard path"
+.It "0x00c0" Ta "0x20" Ta "reserved"
+.It "0x00e0" Ta "size" Ta "OS dependent"
+.El
+.Pp
+The
+.Dq OS ID
+field may have the following values:
+.Bl -column "value" "OS" -offset indent
+.It Sy "value" Ta Sy "OS"
+.It "0x000" Ta "No OS-dependent info"
+.It "0x001" Ta "HP-UX"
+.It "0x002" Ta "MPE-iX"
+.It "0x003" Ta "OSF"
+.It "0x004" Ta "HP-RT"
+.It "0x005" Ta "Novell Netware"
+.El
+.Pp
+The
+.Dq fast size
+field is the amount of memory to be tested upon system boot
+and is a power of two multiplier for 256KB.
+Values of 0xe and 0xf are reserved.
+.It Fn pdc "PDC_STABLE" "PDC_STABLE_WRITE" "address" "ptr" "count"
+Write data pointed to by the
+.Ar ptr
+argument of
+.Ar count
+bytes at
+.Ar address
+in the
+.Dq Stable Storage .
+.It Fn pdc "PDC_STABLE" "PDC_STABLE_SIZE" "ptr"
+Put the size of the
+.Dq Stable Storage
+into the word pointed to by the
+.Ar ptr
+argument.
+.It Fn pdc "PDC_STABLE" "PDC_STABLE_VRFY" "ptr"
+Verify that the contents of the
+.Dq Stable Storage
+are valid.
+.It Fn pdc "PDC_STABLE" "PDC_STABLE_INIT" "ptr"
+Reset the contents of the
+.Dq Stable Storage
+to zeroes.
+.It Fn pdc "PDC_SYSMAP" "PDC_SYSMAP_FIND" "ptr" "path" "number"
+Map module
+.Ar number
+into HPA and also provide an area size starting at HPA and a number of
+additional addresses placed into the data area pointed to by the
+.Ar ptr
+argument words one, two, and three, respectively.
+The device path is placed into the data area pointed to by the
+.Ar path
+argument.
+.It Fn pdc "PDC_SYSMAP" "PDC_SYSMAP_ADDR" "ptr" "im" "ia"
+Retrieve a list of additional addresses for the module number
+.Ar im
+for the address index
+.Ar ia .
+The result is placed into the data area pointed to by
+.Ar ptr ,
+where the first word gives the address and the second the size of the area.
+.It Fn pdc "PDC_SYSMAP" "PDC_SYSMAP_HPA" "ptr" "path_ptr"
+Map device
+.Ar path_ptr
+into device's HPA placed into a word pointed to by the
+.Ar ptr
+argument.
+.It Fn pdc "PDC_TLB" "PDC_TLB_INFO" "ptr"
+Retrieve the hardware TLB handler parameters.
+This includes a minimal and maximal size for the page table, in bytes,
+stored into words zero and one, respectively,
+in the data area pointed to by the
+.Ar ptr
+argument.
+.It Fn pdc "PDC_TLB" "PDC_TLB_CONFIG" "ptr" "base" "size" "param"
+Configure the hardware TLB miss handler given the same parameters fetched
+previously with PDC_TLB_INFO into data area pointed to by the
+.Ar ptr
+and page table
+.Ar base
+address, page table
+.Ar size ,
+and handler parameters
+.Ar param .
+The hardware TLB handler parameter bits are as follows:
+.Pp
+.Bl -tag -width 0xff -compact
+.It 1
+Enable the hardware TLB miss handler.
+The default is to load cr28 with the faulted page table entry address.
+.It 4
+Pointer to the next page table entry is put into cr28.
+.It 6
+Next pointer field of the page table entry is put into cr28.
+.El
+.Pp
+Resetting the page table address and/or size without disabling
+the hardware TLB miss handler is allowed.
+Any changes made are immediate upon Code or Data virtual
+address translation bits are set in PSW.
+.It Fn pdc "PDC_TOD" "PDC_TOD_READ" "ptr"
+Read the TOD, which is a UNIX Epoch time, into the data area
+pointed to by the
+.Ar ptr
+argument.
+That includes seconds in the first word and microseconds in
+the second.
+.It Fn pdc "PDC_TOD" "PDC_TOD_WRITE" "sec" "usec"
+Write TOD with UNIX Epoch time with
+.Ar sec
+seconds and
+.Ar usec
+microseconds.
+.It Fn pdc "PDC_TOD" "PDC_TOD_ITIMER" "ptr"
+Get TOD and CPU timer accuracy into the data location pointed to by the
+.Ar ptr
+argument.
+The first two words specify a double floating-point value giving
+CPU timer frequency.
+The next two words provide accuracy in parts per billion for the TOD and
+CPU timer, respectively.
+.El
+.Sh FILES
+.Bl -tag -width /sys/arch/hppa/dev/cpudevs -compact
+.It machine/pdc.h
+C header file with relevant definitions.
+.It /sys/arch/hppa/dev/cpudevs
+System components' version numbers.
+.It /dev/console
+System console device.
+.El
+.Sh DIAGNOSTICS
+Upon successful completion all procedures return zero.
+The following error codes are returned in case of failures:
+.Pp
+.Bl -tag -width PDC_ERR_NOPROC -compact
+.It PDC_ERR_NOPROC
+No such procedure
+.It PDC_ERR_NOPT
+No such option
+.It PDC_ERR_COMPL
+Unable to complete without error
+.It PDC_ERR_EOD
+No such device
+.It PDC_ERR_INVAL
+Invalid argument
+.It PDC_ERR_PFAIL
+Aborted by powerfail
+.El
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr io 4 ,
+.Xr lasi 4
+.Rs
+.%T PA-RISC 1.1 Firmware Architecture Reference Specification
+.%A Hewlett-Packard
+.%D March 8, 1999
+.Re
+.Rs
+.%T PA-RISC 2.0 Firmware Architecture Reference Specification
+.%A Hewlett-Packard
+.%D March 7, 1999
+.Re
diff --git a/static/openbsd/man4/man4.hppa/phantomas.4 b/static/openbsd/man4/man4.hppa/phantomas.4
new file mode 100644
index 00000000..36f44c18
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/phantomas.4
@@ -0,0 +1,69 @@
+.\"	$OpenBSD: phantomas.4,v 1.10 2020/12/22 10:33:34 tobias Exp $
+.\"
+.\" Copyright (c) 2002 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND,
+.\" USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: December 22 2020 $
+.Dt PHANTOMAS 4 hppa
+.Os
+.Sh NAME
+.Nm phantomas
+.Nd Phantom PseudoBC GSC+ Port
+.Sh SYNOPSIS
+.Cd "phantomas0 at mainbus?"
+.Cd "dino* at phantomas?"
+.Cd "lasi* at phantomas?"
+.Cd "sti* at phantomas?"
+.Cd "wax* at phantomas?"
+.Sh DESCRIPTION
+The Phantom bus converter is used to connect
+various devices and controllers
+to the system bus,
+where the processor
+and memory are located.
+Currently the following are connected:
+the
+.Xr sti 4
+graphics interface;
+the
+.Xr lasi 4
+and
+.Xr wax 4
+bus host adapters for
+.Xr gsc 4 ;
+and the
+.Xr dino 4
+PCI bridge.
+.Sh SEE ALSO
+.Xr dino 4 ,
+.Xr gsc 4 ,
+.Xr intro 4 ,
+.Xr lasi 4 ,
+.Xr sti 4 ,
+.Xr wax 4
+.Sh HISTORY
+The
+.Nm
+driver
+appeared in
+.Ox 3.3 .
diff --git a/static/openbsd/man4/man4.hppa/power.4 b/static/openbsd/man4/man4.hppa/power.4
new file mode 100644
index 00000000..bd822ffa
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/power.4
@@ -0,0 +1,84 @@
+.\"	$OpenBSD: power.4,v 1.5 2007/05/31 19:19:54 jmc Exp $
+.\"
+.\" Copyright (c) 2003 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND,
+.\" USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: May 31 2007 $
+.Dt POWER 4 hppa
+.Os
+.Sh NAME
+.Nm power
+.Nd power button and power fail support
+.Sh SYNOPSIS
+.Cd "power0 at mainbus?"
+.Sh DESCRIPTION
+.Tn HP PA-RISC
+machines support power failure detection in different forms:
+.Pp
+.Bl -bullet -offset indent -compact
+.It
+.Dq soft
+power button
+.It
+power failure interrupt
+.El
+.Pp
+The
+.Nm
+driver tries its best to determine the power failure condition
+that is a result of a power button being depressed or a power supply
+system failure or a similar condition.
+Upon detection of any of the aforementioned conditions, it tries to gracefully
+.Pq if possible
+shutdown the system through a call to the
+.Xr boot 9
+function.
+.Pp
+On systems equipped with the
+.Xr lasi 4
+bus adapter, we find a
+.Dq soft
+power button which upon depression gives us a signal in the
+.Dq power register
+and thus polling periodically we detect the event.
+Since that bit comes directly from the power button without any dampening,
+we perform a second long delay;
+thus quick transitions off and on will
+.Em not
+result in a shutdown.
+.Pp
+On modern systems, an interruption is signalled upon the power
+button depression and thus this avoids polling and does not require
+.Pq as does being implemented in hardware
+dampening.
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr lasi 4 ,
+.Xr pdc 4 ,
+.Xr boot 9
+.Sh HISTORY
+The
+.Nm
+driver
+appeared in
+.Ox 3.4 .
diff --git a/static/openbsd/man4/man4.hppa/runway.4 b/static/openbsd/man4/man4.hppa/runway.4
new file mode 100644
index 00000000..b64ba6be
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/runway.4
@@ -0,0 +1,65 @@
+.\"	$OpenBSD: runway.4,v 1.5 2007/05/31 19:19:54 jmc Exp $
+.\"
+.\" Copyright (c) 2004 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND,
+.\" USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: May 31 2007 $
+.Dt RUNWAY 4 hppa
+.Os
+.Sh NAME
+.Nm runway
+.Nd Runway bus
+.Sh SYNOPSIS
+.Cd "uturn* at mainbus?"
+.Sh DESCRIPTION
+The
+.Nm
+bus is a CPU and memory bus on systems based on the PA-7200,
+PA-8000, and later CPUs.
+The
+.Nm
+bus is a 64-bit multiplexed address/data bus with support for cache
+coherency and allows up to 4-way SMP system configurations.
+.Pp
+One or two
+.Xr uturn 4
+bridges connect the
+.Nm
+bus to the system's
+.Xr gsc 4
+or
+.Xr pci 4
+buses.
+.Sh SEE ALSO
+.Xr cpu 4 ,
+.Xr dino 4 ,
+.Xr gsc 4 ,
+.Xr intro 4 ,
+.Xr pci 4 ,
+.Xr uturn 4
+.Sh HISTORY
+The
+.Nm
+driver
+first appeared in
+.Ox 3.7 .
diff --git a/static/openbsd/man4/man4.hppa/ssio.4 b/static/openbsd/man4/man4.hppa/ssio.4
new file mode 100644
index 00000000..208738d2
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/ssio.4
@@ -0,0 +1,51 @@
+.\"	$OpenBSD: ssio.4,v 1.4 2007/07/15 20:00:49 kettenis Exp $
+.\"
+.\" Copyright (c) 2007 Mark Kettenis <kettenis@openbsd.org>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate: July 15 2007 $
+.Dt SSIO 4 hppa
+.Os
+.Sh NAME
+.Nm ssio
+.Nd National Semiconductor PC87560 Legacy IO
+.Sh SYNOPSIS
+.Cd "ssio* at pci?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the National Semiconductor PC87560 Legacy IO
+chip on systems with PA-8500 and later 64-bit CPUs.
+It configures the Programmable Interrupt Controllers integrated on the chip
+to route interrupts for the integrated
+.Xr ohci 4
+USB controller (which appears as a separate PCI device).
+.Pp
+.Ox
+provides support for the following devices:
+.Pp
+.Bl -tag -width 12n -offset indent -compact
+.It Xr com 4
+serial communications interface
+.It Xr lpt 4
+parallel port driver
+.El
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr pci 4
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 4.2 .
diff --git a/static/openbsd/man4/man4.hppa/uturn.4 b/static/openbsd/man4/man4.hppa/uturn.4
new file mode 100644
index 00000000..70e2195c
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/uturn.4
@@ -0,0 +1,65 @@
+.\"	$OpenBSD: uturn.4,v 1.8 2008/04/27 19:33:39 jmc Exp $
+.\"
+.\" Copyright (c) 2004 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND,
+.\" USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: April 27 2008 $
+.Dt UTURN 4 hppa
+.Os
+.Sh NAME
+.Nm uturn
+.Nd U2/Uturn, Runway to GSC Bus bridge & IOA
+.Sh SYNOPSIS
+.Cd "uturn* at mainbus?"
+.Cd "astro* at uturn?"
+.Cd "dino* at uturn?"
+.Cd "lasi* at uturn?"
+.Cd "gecko* at uturn?"
+.Cd "sti* at uturn?"
+.Sh DESCRIPTION
+.Nm
+provides the functionality of IOA (not currently supported) as a bridge
+from the Runway bus (see
+.Xr runway 4
+for more information) to GSC.
+Modern systems, based on the PA-8000 and later 64-bit CPUs, use the
+.Nm U-Turn
+version, whilst earlier systems, based on the PA-7200 CPU, used
+a different version of the chip called
+.Nm U2 .
+.Sh SEE ALSO
+.Xr astro 4 ,
+.Xr cpu 4 ,
+.Xr dino 4 ,
+.Xr gecko 4 ,
+.Xr gsc 4 ,
+.Xr intro 4 ,
+.Xr pci 4 ,
+.Xr runway 4 ,
+.Xr sti 4
+.Sh HISTORY
+The
+.Nm
+driver
+appeared in
+.Ox 3.7 .
diff --git a/static/openbsd/man4/man4.hppa/wax.4 b/static/openbsd/man4/man4.hppa/wax.4
new file mode 100644
index 00000000..17ad9c76
--- /dev/null
+++ b/static/openbsd/man4/man4.hppa/wax.4
@@ -0,0 +1,105 @@
+.\"	$OpenBSD: wax.4,v 1.7 2007/05/31 19:19:54 jmc Exp $
+.\"
+.\"
+.\" Copyright (c) 2003 Michael Shalayeff
+.\" All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd $Mdocdate: May 31 2007 $
+.Dt WAX 4 hppa
+.Os
+.Sh NAME
+.Nm wax
+.Nd GSC bus controller and I/O subsystem
+.Sh SYNOPSIS
+.Cd "wax* at mainbus0 irq 24"
+.Cd "wax* at phantomas0 irq 24"
+.Cd "gsc2 at wax?"
+.Sh DESCRIPTION
+The
+.Nm
+GSC bus controller is a version of
+.Xr lasi 4
+with limited functionality and no additional devices on the crystal.
+It is mainly used as a GSC bus controller for additional onboard devices
+(e.g. 2nd RS232 or HIL) and sometimes add-on cards (such as a TR-9000
+card for the
+.Tn HP 9000/712
+models).
+.Sh MACHINES
+An incomplete list of machines that use the
+.Nm
+bus controller:
+.Pp
+.Bl -bullet -compact
+.It
+712/* add-on cards
+.It
+715/{64/80/100}[XC]
+.It
+725/{64/80/100}
+.It
+743/*
+.It
+744/*
+.It
+745/*
+.It
+A180[C]
+.It
+B132L[+], B160L, B180L+
+.It
+C100, C110
+.It
+J200, J210[XC]
+.It
+RDI PrecisionBook
+.El
+.Sh SEE ALSO
+.Xr asp 4 ,
+.Xr gsc 4 ,
+.Xr intro 4 ,
+.Xr io 4 ,
+.Xr lasi 4 ,
+.Xr phantomas 4
+.Rs
+.%T Precision I/O Architecture Reference Specification
+.%Q Hewlett-Packard
+.Re
+.Rs
+.%T 712 I/O Subsystem ERS
+.%N Revision 1.1
+.%D 12 February 1993
+.%Q Hewlett-Packard
+.%V Dwg No. A-A2263-66510-31
+.Re
+.Rs
+.%Q Hewlett-Packard Journal
+.%D April 1995
+.%V Volume 46 Number 2
+.Re
+.Sh HISTORY
+The
+.Nm
+driver
+appeared in
+.Ox 3.4 .