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.\" $NetBSD: paravirt_membar_sync.9,v 1.1 2025/09/06 02:53:22 riastradh Exp $
.\"
.\" Copyright (c) 2025 The NetBSD Foundation
.\" All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
.\" POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd August 31, 2025
.Dt PARAVIRT_MEMBAR_SYNC 9
.Os
.Sh NAME
.Nm paravirt_membar_sync
.Nd memory barrier for paravirtualized device drivers
.Sh SYNOPSIS
.In sys/paravirt_membar.h
.Ft void
.Fn paravirt_membar_sync "void"
.Sh DESCRIPTION
The
.Nm
function issues a store-before-load barrier for coordination with a
paravirtualized device.
.Pp
This function has the same ordering semantics as
.Xr membar_sync 3 ,
but
.Xr membar_sync 3
can only coordinate with other CPUs that
.Nx
is running on.
In a virtual machine,
.Nx
may be running on a single
.Em virtual
CPU, and patch
.Xr membar_sync 3
to be a no-op, while the host side of a paravirtualized device may be
running on a different
.Em physical
CPU requiring a barrier that
.Xr membar_sync 3
does not issue.
.Sh EXAMPLES
Submit a request to the host device, and notify the host to process
it\(embut elide the notification, which is expensive, if the host is
already reading requests anyway:
.Bd -literal
/*
* Write the request into the ring buffer.
*/
memcpy(cputodev_ring->buffer[sc->sc_cputodev_idx], request,
sizeof(*request));
/*
* Publish the request to the host device side.
*/
cputodev_ring->header->producer_tail = ++sc->sc_cputodev_idx;
/*
* Ensure we have published it _before_ we check whether the
* host needs notification.
*/
paravirt_membar_sync();
/*
* Notify the host, if needed. Notifying the host is usually
* expensive (trap to hypervisor), so we try to avoid it if not
* needed.
*/
if (cputodev_ring->header->needs_notification)
notify_host();
.Ed
.Pp
Enable interrupts from the host and check whether any were pending
while interrupts were disabled:
.Bd -literal
/*
* Tell the host device to deliver interrupts after this
* point.
*/
restart:
devtocpu_ring->header->needs_notification = true;
/*
* Ensure we have requested interrupts _before_ we check
* whether we missed any notifications.
*/
paravirt_membar_sync();
/*
* Check whether there were any pending notifications while
* interrupts were blocked. If not, stop here.
*/
idx = devtocpu_ring->header->producer_idx;
if (sc->sc_devtocpu_idx == idx)
return;
/*
* Process the notifications.
*/
devtocpu_ring->header->needs_notification = false;
while (sc->sc_devtocpu_idx != idx) {
struct buffer *buf =
devtocpu_ring->buffer[sc->sc_devtocpu_idx];
process_notification(buf);
sc->sc_devtocpu_idx++;
sc->sc_devtocpu_idx %= ringlen;
}
goto restart;
.Ed
.Pp
.Sy "N.B.:"
Other ordering or bouncing may be required with
.Xr bus_dmamap_sync 9 ;
this is independent of
.Nm ,
which is needed
.Em in addition to
.Xr bus_dmamap_sync 9
to guarantee store-before-load ordering when there is no intervening
I/O doorbell trigger for a DMA operation, nor interrupt delivery for a
DMA completion.
.Sh SEE ALSO
.Xr membar_ops 3 ,
.Xr bus_dma 9 ,
.Xr bus_space 9
.Sh HISTORY
These atomic operations first appeared in
.Nx 12.0 .
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