path: root/static/netbsd/man4/ahc.4 3.html

<table class="head">
  <tr>
    <td class="head-ltitle">AHC(4)</td>
    <td class="head-vol">Device Drivers Manual</td>
    <td class="head-rtitle">AHC(4)</td>
  </tr>
</table>
<div class="manual-text">
<section class="Sh">
<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1>
<p class="Pp"><code class="Nm">ahc</code> &#x2014; <span class="Nd">Adaptec
    VL/EISA/PCI/CardBus SCSI host adapter driver</span></p>
</section>
<section class="Sh">
<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1>
<p class="Pp">For VL cards:
  <br/>
  <code class="Cd">ahc0 at isa? port ? irq ?</code></p>
<p class="Pp">For EISA cards:
  <br/>
  <code class="Cd">ahc* at eisa? slot ?</code></p>
<p class="Pp">For PCI cards:
  <br/>
  <code class="Cd">ahc* at pci? dev ? function ?</code></p>
<p class="Pp">For CardBus cards:
  <br/>
  <code class="Cd">ahc* at cardbus? function ?</code></p>
<p class="Pp">To allow PCI adapters to use memory mapped I/O if enabled:
  <br/>
  <code class="Cd">options AHC_ALLOW_MEMIO</code></p>
<p class="Pp">Disable tagged queuing (avoids hangs on some hardware under load)
  <br/>
  <code class="Cd">options AHC_NO_TAGS</code></p>
<p class="Pp">Change the default SCSI id for cards without a SEEPROM (default
    7):
  <br/>
  <code class="Cd">options AHC_CARDBUS_DEFAULT_SCSI_ID=integer</code></p>
<p class="Pp">For SCSI buses:
  <br/>
  <code class="Cd">scsibus* at ahc?</code></p>
</section>
<section class="Sh">
<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1>
<p class="Pp">The <code class="Nm">ahc</code> device driver supports SCSI
    controllers based on Adaptec AIC77xx and AIC78xx SCSI host adapter chips
    found on many motherboards as well as Adaptec SCSI controller cards.</p>
<p class="Pp">Driver features include support for twin and wide buses, fast,
    ultra or ultra2 synchronous transfers depending on controller type, tagged
    queuing and SCB paging.</p>
<p class="Pp">Memory mapped I/O can be enabled for PCI devices with the
    &#x201C;<code class="Dv">AHC_ALLOW_MEMIO</code>&#x201D; configuration
    option. Memory mapped I/O is more efficient than the alternative, programmed
    I/O. Most PCI BIOSes will map devices so that either technique for
    communicating with the card is available. In some cases, usually when the
    PCI device is sitting behind a PCI-&gt;PCI bridge, the BIOS may fail to
    properly initialize the chip for memory mapped I/O. The typical symptom of
    this problem is a system hang if memory mapped I/O is attempted. Most modern
    motherboards perform the initialization correctly and work fine with this
    option enabled.</p>
<p class="Pp">Per target configuration performed in the SCSI-Select menu,
    accessible at boot in non-EISA models, or through an EISA configuration
    utility for EISA models, is honored by this driver. This includes
    synchronous/asynchronous transfers, maximum synchronous negotiation rate,
    wide transfers, disconnection, the host adapter's SCSI ID, and, in the case
    of EISA Twin Channel controllers, the primary channel selection. For systems
    that store non-volatile settings in a system specific manner rather than a
    serial EEPROM directly connected to the aic7xxx controller, the BIOS must be
    enabled for the driver to access this information. This restriction applies
    to all EISA and many motherboard configurations.</p>
<p class="Pp">Note that I/O addresses are determined automatically by the probe
    routines, but care should be taken when using a 284x (VESA
    <span class="No">local bus controller</span>) in an EISA system. The jumpers
    setting the I/O area for the 284x should match the EISA slot into which the
    card is inserted to prevent conflicts with other EISA cards.</p>
<p class="Pp">Performance and feature sets vary throughout the aic7xxx product
    line. The following table provides a comparison of the different chips
    supported by the <code class="Nm">ahc</code> driver. Note that wide and twin
    channel features, although always supported by a particular chip, may be
    disabled in a particular motherboard or card design.</p>
<table class="Bl-column">
  <tr id="Chip">
    <td><a class="permalink" href="#Chip"><b class="Sy">Chip</b></a></td>
    <td><a class="permalink" href="#MIPS"><b class="Sy" id="MIPS">MIPS</b></a></td>
    <td><a class="permalink" href="#Bus"><b class="Sy" id="Bus">Bus</b></a></td>
    <td><a class="permalink" href="#MaxSync"><b class="Sy" id="MaxSync">MaxSync</b></a></td>
    <td><a class="permalink" href="#MaxWidth"><b class="Sy" id="MaxWidth">MaxWidth</b></a></td>
    <td><a class="permalink" href="#SCBs"><b class="Sy" id="SCBs">SCBs</b></a></td>
    <td><a class="permalink" href="#Features"><b class="Sy" id="Features">Features</b></a></td>
  </tr>
  <tr>
    <td>aic7770</td>
    <td>10</td>
    <td>EISA/VL</td>
    <td>10MHz</td>
    <td>16Bit</td>
    <td>4</td>
    <td>1</td>
  </tr>
  <tr>
    <td>aic7850</td>
    <td>10</td>
    <td>PCI/32</td>
    <td>10MHz</td>
    <td>8Bit</td>
    <td>3</td>
    <td></td>
  </tr>
  <tr>
    <td>aic7860</td>
    <td>10</td>
    <td>PCI/32</td>
    <td>20MHz</td>
    <td>8Bit</td>
    <td>3</td>
    <td></td>
  </tr>
  <tr>
    <td>aic7870</td>
    <td>10</td>
    <td>PCI/32</td>
    <td>10MHz</td>
    <td>16Bit</td>
    <td>16</td>
    <td></td>
  </tr>
  <tr>
    <td>aic7880</td>
    <td>10</td>
    <td>PCI/32</td>
    <td>20MHz</td>
    <td>16Bit</td>
    <td>16</td>
    <td></td>
  </tr>
  <tr>
    <td>aic7890</td>
    <td>20</td>
    <td>PCI/32</td>
    <td>40MHz</td>
    <td>16Bit</td>
    <td>16</td>
    <td>3 4 5 6 7 8</td>
  </tr>
  <tr>
    <td>aic7891</td>
    <td>20</td>
    <td>PCI/64</td>
    <td>40MHz</td>
    <td>16Bit</td>
    <td>16</td>
    <td>3 4 5 6 7 8</td>
  </tr>
  <tr>
    <td>aic7892</td>
    <td>20</td>
    <td>PCI/64</td>
    <td>80MHz</td>
    <td>16Bit</td>
    <td>16</td>
    <td>3 4 5 6 7 8</td>
  </tr>
  <tr>
    <td>aic7895</td>
    <td>15</td>
    <td>PCI/32</td>
    <td>20MHz</td>
    <td>16Bit</td>
    <td>16</td>
    <td>2 3 4 5</td>
  </tr>
  <tr>
    <td>aic7895C</td>
    <td>15</td>
    <td>PCI/32</td>
    <td>20MHz</td>
    <td>16Bit</td>
    <td>16</td>
    <td>2 3 4 5 8</td>
  </tr>
  <tr>
    <td>aic7896</td>
    <td>20</td>
    <td>PCI/32</td>
    <td>40MHz</td>
    <td>16Bit</td>
    <td>16</td>
    <td>2 3 4 5 6 7 8</td>
  </tr>
  <tr>
    <td>aic7897</td>
    <td>20</td>
    <td>PCI/64</td>
    <td>40MHz</td>
    <td>16Bit</td>
    <td>16</td>
    <td>2 3 4 5 6 7 8</td>
  </tr>
  <tr>
    <td>aic7899</td>
    <td>20</td>
    <td>PCI/64</td>
    <td>80MHz</td>
    <td>16Bit</td>
    <td>16</td>
    <td>2 3 4 5 6 7 8</td>
  </tr>
</table>
<ol class="Bl-enum Bl-compact">
  <li>Multiplexed Twin Channel Device - One controller servicing two buses.</li>
  <li>Multi-function Twin Channel Device - Two controllers on one chip.</li>
  <li>Command Channel Secondary DMA Engine - Allows scatter gather list and SCB
      prefetch.</li>
  <li>64 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an
      extra DMA.</li>
  <li>Block Move Instruction Support - Doubles the speed of certain sequencer
      operations.</li>
  <li>&#x2018;Bayonet&#x2019; style Scatter Gather Engine - Improves S/G
      prefetch performance.</li>
  <li>Queuing Registers - Allows queuing of new transactions without pausing the
      sequencer.</li>
  <li>Multiple Target IDs - Allows the controller to respond to selection as a
      target on multiple SCSI IDs.</li>
</ol>
</section>
<section class="Sh">
<h1 class="Sh" id="HARDWARE"><a class="permalink" href="#HARDWARE">HARDWARE</a></h1>
<p class="Pp">Supported SCSI controllers include:</p>
<ul class="Bl-item Bd-indent">
  <li>Adaptec AHA-2742W EISA Fast Wide SCSI adapter</li>
  <li>Adaptec AHA-274xAT EISA dual channel Fast SCSI adapter</li>
  <li>Adaptec AHA-284x VL Fast SCSI adapter</li>
  <li>Adaptec AHA-2910 PCI Fast SCSI adapter (no SCSI BIOS)</li>
  <li>Adaptec AHA-2915 PCI Fast SCSI adapter (no SCSI BIOS)</li>
  <li>Adaptec AHA-2920C PCI Fast SCSI adapter
    <ul class="Bl-item Bd-indent">
      <li>Note: Adaptec AHA-2920/A which use the Future Domain's chips are not
          supported by this driver.</li>
    </ul>
  </li>
  <li>Adaptec AHA-2930C PCI Ultra SCSI adapter</li>
  <li>Adaptec AHA-2930U2 PCI Ultra2 Wide LVD SCSI adapter</li>
  <li>Adaptec AHA-2940 PCI Fast SCSI adapter</li>
  <li>Adaptec AHA-2940U PCI Ultra SCSI adapter</li>
  <li>Adaptec AHA-2940AU PCI Ultra SCSI adapter</li>
  <li>Adaptec AHA-2940UW PCI Ultra Wide SCSI adapter</li>
  <li>Adaptec AHA-2940UW Dual PCI dual channel Ultra Wide SCSI adapter</li>
  <li>Adaptec AHA-2940UW Pro PCI Ultra Wide SCSI adapter</li>
  <li>Adaptec AHA-2940U2W PCI Ultra2 Wide LVD SCSI adapter</li>
  <li>Adaptec AHA-2940U2B PCI Ultra2 Wide LVD SCSI adapter</li>
  <li>Adaptec AHA-2944W PCI Fast Wide Differential SCSI adapter</li>
  <li>Adaptec AHA-2944UW PCI Ultra Wide Differential SCSI adapter</li>
  <li>Adaptec AHA-2950U2W</li>
  <li>Adaptec AHA-2950U2B 64bit PCI Ultra2 Wide LVD SCSI adapter</li>
  <li>Adaptec AHA-19160B PCI Ultra160 Wide LVD SCSI adapter</li>
  <li>Adaptec ASC-29160 PCI Ultra160 Wide LVD SCSI adapter</li>
  <li>Adaptec AHA-29160N PCI Ultra160 Wide LVD SCSI adapter</li>
  <li>Adaptec AHA-29160B 64bit PCI Ultra160 Wide LVD SCSI adapter</li>
  <li>Adaptec AHA-3940 PCI dual channel Fast SCSI adapter</li>
  <li>Adaptec AHA-3940U PCI dual channel Ultra SCSI adapter</li>
  <li>Adaptec AHA-3940AU PCI dual channel Ultra SCSI adapter</li>
  <li>Adaptec AHA-3940UW PCI dual channel Ultra Wide SCSI adapter</li>
  <li>Adaptec AHA-3940AUW PCI dual channel Ultra Wide SCSI adapter</li>
  <li>Adaptec AHA-3940U2W PCI dual channel Ultra2 Wide LVD SCSI adapter</li>
  <li>Adaptec AHA-3950U2 64bit PCI dual channel Ultra2 Wide LVD SCSI
    adapter</li>
  <li>Adaptec AHA-3960 64bit PCI dual channel Ultra160 Wide LVD SCSI
    adapter</li>
  <li>Adaptec AHA-3985 PCI dual channel Fast SCSI RAID adapter</li>
  <li>Adaptec AHA-39160 64bit PCI dual channel Ultra160 Wide LVD SCSI
    adapter</li>
  <li>Adaptec AHA-4944UW PCI quad channel PCI Ultra Wide Differential SCSI
      adapter</li>
  <li>Other SCSI controllers based on the Adaptec AIC7770, AIC7850, AIC7860,
      AIC7870, AIC7880, AIC7890, AIC7891, AIC7892, AIC7895, AIC7896, AIC7897 and
      AIC7899 SCSI host adapter chips.</li>
</ul>
</section>
<section class="Sh">
<h1 class="Sh" id="SCSI_CONTROL_BLOCKS_(SCBs)"><a class="permalink" href="#SCSI_CONTROL_BLOCKS_(SCBs)">SCSI
  CONTROL BLOCKS (SCBs)</a></h1>
<p class="Pp">Every transaction sent to a device on the SCSI bus is assigned a
    &#x2018;SCSI Control Block&#x2019; (SCB). The SCB contains all of the
    information required by the controller to process a transaction. The chip
    feature table lists the number of SCBs that can be stored in on-chip memory.
    All chips with model numbers greater than or equal to 7870 allow for the on
    chip SCB space to be augmented with external SRAM up to a maximum of 255
    SCBs. Very few Adaptec controller configurations have external SRAM.</p>
<p class="Pp" id="SCB">If external SRAM is not available, SCBs are a limited
    resource. Using the SCBs in a straight forward manner would only allow the
    driver to handle as many concurrent transactions as there are physical SCBs.
    To fully use the SCSI bus and the devices on it, requires much more
    concurrency. The solution to this problem is
    <a class="permalink" href="#SCB"><i class="Em">SCB Paging</i></a>, a concept
    similar to memory paging. SCB paging takes advantage of the fact that
    devices usually disconnect from the SCSI bus for long periods of time
    without talking to the controller. The SCBs for disconnected transactions
    are only of use to the controller when the transfer is resumed. When the
    host queues another transaction for the controller to execute, the
    controller firmware will use a free SCB if one is available. Otherwise, the
    state of the most recently disconnected (and therefore most likely to stay
    disconnected) SCB is saved, via DMA, to host memory, and the local SCB
    reused to start the new transaction. This allows the controller to queue up
    to 255 transactions regardless of the amount of SCB space. Since the local
    SCB space serves as a cache for disconnected transactions, the more SCB
    space available, the less host bus traffic consumed saving and restoring SCB
    data.</p>
</section>
<section class="Sh">
<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE
  ALSO</a></h1>
<p class="Pp"><a class="Xr">aha(4)</a>, <a class="Xr">ahb(4)</a>,
    <a class="Xr">ahd(4)</a>, <a class="Xr">cd(4)</a>, <a class="Xr">ch(4)</a>,
    <a class="Xr">intro(4)</a>, <a class="Xr">scsi(4)</a>,
    <a class="Xr">sd(4)</a>, <a class="Xr">st(4)</a></p>
</section>
<section class="Sh">
<h1 class="Sh" id="HISTORY"><a class="permalink" href="#HISTORY">HISTORY</a></h1>
<p class="Pp">The <code class="Nm">ahc</code> driver appeared in
    <span class="Ux">FreeBSD 2.0</span> and <span class="Ux">NetBSD
  1.1</span>.</p>
</section>
<section class="Sh">
<h1 class="Sh" id="AUTHORS"><a class="permalink" href="#AUTHORS">AUTHORS</a></h1>
<p class="Pp">The <code class="Nm">ahc</code> driver, the AIC7xxx sequencer-code
    assembler, and the firmware running on the aic7xxx chips was written by
    <span class="An">Justin T. Gibbs</span>. <span class="Ux">NetBSD</span>
    porting is done by Stefan Grefen, Charles M. Hannum, Michael Graff, Jason R.
    Thorpe, Pete Bentley, Frank van der Linden and Noriyuki Soda.</p>
</section>
<section class="Sh">
<h1 class="Sh" id="BUGS"><a class="permalink" href="#BUGS">BUGS</a></h1>
<p class="Pp">Some Quantum drives (at least the Empire 2100 and 1080s) will not
    run on an AIC7870 Rev B in synchronous mode at 10MHz. Controllers with this
    problem have a 42 MHz clock crystal on them and run slightly above 10MHz.
    This confuses the drive and hangs the bus. Setting a maximum synchronous
    negotiation rate of 8MHz in the SCSI-Select utility will allow normal
    operation.</p>
<p class="Pp">Target mode is not supported on <span class="Ux">NetBSD</span>
    version of this driver.</p>
</section>
</div>
<table class="foot">
  <tr>
    <td class="foot-date">July 16, 2007</td>
    <td class="foot-os">NetBSD 10.1</td>
  </tr>
</table>