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<table class="head">
<tr>
<td class="head-ltitle">TI(4)</td>
<td class="head-vol">Device Drivers Manual</td>
<td class="head-rtitle">TI(4)</td>
</tr>
</table>
<div class="manual-text">
<section class="Sh">
<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1>
<p class="Pp"><code class="Nm">ti</code> — <span class="Nd">Alteon
Networks Tigon I and Tigon II Gigabit Ethernet driver</span></p>
</section>
<section class="Sh">
<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1>
<p class="Pp">To compile this driver into the kernel, place the following lines
in your kernel configuration file:</p>
<div class="Bd Pp Bd-indent"><code class="Cd">device ti</code>
<br/>
<code class="Cd">options TI_SF_BUF_JUMBO</code>
<br/>
<code class="Cd">options TI_JUMBO_HDRSPLIT</code></div>
<p class="Pp">Alternatively, to load the driver as a module at boot time, place
the following line in <a class="Xr">loader.conf(5)</a>:</p>
<div class="Bd Pp Bd-indent Li">
<pre>if_ti_load="YES"</pre>
</div>
</section>
<section class="Sh">
<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1>
<p class="Pp">The <code class="Nm">ti</code> driver provides support for PCI
Gigabit Ethernet adapters based on the Alteon Networks Tigon Gigabit
Ethernet controller chip. The Tigon contains an embedded R4000 CPU, gigabit
MAC, dual DMA channels and a PCI interface unit. The Tigon II contains two
R4000 CPUs and other refinements. Either chip can be used in either a 32-bit
or 64-bit PCI slot. Communication with the chip is achieved via PCI shared
memory and bus master DMA. The Tigon I and II support hardware multicast
address filtering, VLAN tag extraction and insertion, and jumbo Ethernet
frames sizes up to 9000 bytes. Note that the Tigon I chipset is no longer in
active production: all new adapters should come equipped with Tigon II
chipsets.</p>
<p class="Pp">While the Tigon chipset supports 10, 100 and 1000Mbps speeds,
support for 10 and 100Mbps speeds is only available on boards with the
proper transceivers. Most adapters are only designed to work at 1000Mbps,
however the driver should support those NICs that work at lower speeds as
well.</p>
<p class="Pp">Support for jumbo frames is provided via the interface MTU
setting. Selecting an MTU larger than 1500 bytes with the
<a class="Xr">ifconfig(8)</a> utility configures the adapter to receive and
transmit jumbo frames. Using jumbo frames can greatly improve performance
for certain tasks, such as file transfers and data streaming.</p>
<p class="Pp">Header splitting support for Tigon 2 boards (this option has no
effect for the Tigon 1) can be turned on with the
<code class="Dv">TI_JUMBO_HDRSPLIT</code> option. See
<a class="Xr">zero_copy(9)</a> for more discussion on zero copy receive and
header splitting.</p>
<p class="Pp">The <code class="Nm">ti</code> driver uses UMA backed jumbo
receive buffers, but can be configured to use <a class="Xr">sendfile(2)</a>
buffer allocator. To turn on <a class="Xr">sendfile(2)</a> buffer allocator,
use the <code class="Dv">TI_SF_BUF_JUMBO</code> option.</p>
<p class="Pp">Support for vlans is also available using the
<a class="Xr">vlan(4)</a> mechanism. See the <a class="Xr">vlan(4)</a> man
page for more details.</p>
<p class="Pp">The <code class="Nm">ti</code> driver supports the following media
types:</p>
<dl class="Bl-tag">
<dt>autoselect</dt>
<dd>Enable autoselection of the media type and options. The user can manually
override the autoselected mode by adding media options to the
<span class="Pa">/etc/rc.conf</span> file.</dd>
<dt>10baseT/UTP</dt>
<dd>Set 10Mbps operation. The <var class="Ar">mediaopt</var> option can also
be used to select either <var class="Ar">full-duplex</var> or
<var class="Ar">half-duplex</var> modes.</dd>
<dt>100baseTX</dt>
<dd>Set 100Mbps (Fast Ethernet) operation. The <var class="Ar">mediaopt</var>
option can also be used to select either <var class="Ar">full-duplex</var>
or <var class="Ar">half-duplex</var> modes.</dd>
<dt>1000baseSX</dt>
<dd>Set 1000Mbps (Gigabit Ethernet) operation. Only
<var class="Ar">full-duplex</var> mode is supported at this speed.</dd>
</dl>
<p class="Pp">The <code class="Nm">ti</code> driver supports the following media
options:</p>
<dl class="Bl-tag">
<dt>full-duplex</dt>
<dd>Force full-duplex operation.</dd>
<dt>half-duplex</dt>
<dd>Force half duplex operation.</dd>
</dl>
<p class="Pp">For more information on configuring this device, see
<a class="Xr">ifconfig(8)</a>.</p>
</section>
<section class="Sh">
<h1 class="Sh" id="HARDWARE"><a class="permalink" href="#HARDWARE">HARDWARE</a></h1>
<p class="Pp">The <code class="Nm">ti</code> driver supports Gigabit Ethernet
adapters based on the Alteon Tigon I and II chips. The
<code class="Nm">ti</code> driver has been tested with the following
adapters:</p>
<p class="Pp"></p>
<ul class="Bl-bullet Bl-compact">
<li>3Com 3c985-SX Gigabit Ethernet adapter (Tigon 1)</li>
<li>3Com 3c985B-SX Gigabit Ethernet adapter (Tigon 2)</li>
<li>Alteon AceNIC V Gigabit Ethernet adapter (1000baseSX)</li>
<li>Alteon AceNIC V Gigabit Ethernet adapter (1000baseT)</li>
<li>Digital EtherWORKS 1000SX PCI Gigabit adapter</li>
<li>Netgear GA620 Gigabit Ethernet adapter (1000baseSX)</li>
<li>Netgear GA620T Gigabit Ethernet adapter (1000baseT)</li>
</ul>
<p class="Pp">The following adapters should also be supported but have not yet
been tested:</p>
<p class="Pp"></p>
<ul class="Bl-bullet Bl-compact">
<li>Asante GigaNIX1000T Gigabit Ethernet adapter</li>
<li>Asante PCI 1000BASE-SX Gigabit Ethernet adapter</li>
<li>Farallon PN9000SX Gigabit Ethernet adapter</li>
<li>NEC Gigabit Ethernet</li>
<li>Silicon Graphics PCI Gigabit Ethernet adapter</li>
</ul>
</section>
<section class="Sh">
<h1 class="Sh" id="LOADER_TUNABLES"><a class="permalink" href="#LOADER_TUNABLES">LOADER
TUNABLES</a></h1>
<p class="Pp">Tunables can be set at the <a class="Xr">loader(8)</a> prompt
before booting the kernel or stored in <a class="Xr">loader.conf(5)</a>.</p>
<dl class="Bl-tag">
<dt id="hw.ti._d.dac"><var class="Va">hw.ti.%d.dac</var></dt>
<dd>If this tunable is set to 0 it will disable DAC (Dual Address Cycle). The
default value is 1 which means driver will use full 64bit DMA
addressing.</dd>
</dl>
</section>
<section class="Sh">
<h1 class="Sh" id="SYSCTL_VARIABLES"><a class="permalink" href="#SYSCTL_VARIABLES">SYSCTL
VARIABLES</a></h1>
<p class="Pp">The following variables are available as both
<a class="Xr">sysctl(8)</a> variables and <a class="Xr">loader(8)</a>
tunables. The interface has to be brought down and up again before a change
takes effect when any of the following tunables are changed. The one
microsecond clock tick referenced below is a nominal time and the actual
hardware may not provide granularity to this level. For example, on Tigon 2
(revision 6) cards with release 12.0 the clock granularity is 5
microseconds.</p>
<dl class="Bl-tag">
<dt id="dev.ti._d.rx_coal_ticks"><var class="Va">dev.ti.%d.rx_coal_ticks</var></dt>
<dd>This value, receive coalesced ticks, controls the number of clock ticks
(of 1 microseconds each) that must elapse before the NIC DMAs the receive
return producer pointer to the Host and generates an interrupt. This
parameter works in conjunction with the rx_max_coal_bds, receive max
coalesced BDs, tunable parameter. The NIC will return the receive return
producer pointer to the Host when either of the thresholds is exceeded. A
value of 0 means that this parameter is ignored and receive BDs will only
be returned when the receive max coalesced BDs value is reached. The
default value is 170.</dd>
<dt id="dev.ti._d.rx_max_coal_bds"><var class="Va">dev.ti.%d.rx_max_coal_bds</var></dt>
<dd>This value, receive max coalesced BDs, controls the number of receive
buffer descriptors that will be coalesced before the NIC updates the
receive return ring producer index. If this value is set to 0 it will
disable receive buffer descriptor coalescing. The default value is
64.</dd>
<dt id="dev.ti._d.ti_tx_coal_ticks"><var class="Va">dev.ti.%d.ti_tx_coal_ticks</var></dt>
<dd>This value, send coalesced ticks, controls the number of clock ticks (of 1
microseconds each) that must elapse before the NIC DMAs the send consumer
pointer to the Host and generates an interrupt. This parameter works in
conjunction with the tx_max_coal_bds, send max coalesced BDs, tunable
parameter. The NIC will return the send consumer pointer to the Host when
either of the thresholds is exceeded. A value of 0 means that this
parameter is ignored and send BDs will only be returned when the send max
coalesced BDs value is reached. The default value is 2000.</dd>
<dt id="dev.ti._d.tx_max_coal_bds"><var class="Va">dev.ti.%d.tx_max_coal_bds</var></dt>
<dd>This value, send max coalesced BDs, controls the number of send buffer
descriptors that will be coalesced before the NIC updates the send
consumer index. If this value is set to 0 it will disable send buffer
descriptor coalescing. The default value is 32.</dd>
<dt id="dev.ti._d.tx_buf_ratio"><var class="Va">dev.ti.%d.tx_buf_ratio</var></dt>
<dd>This value controls the ratio of the remaining memory in the NIC that
should be devoted to transmit buffer vs. receive buffer. The lower 7 bits
are used to indicate the ratio in 1/64th increments. For example, setting
this value to 16 will set the transmit buffer to 1/4 of the remaining
buffer space. In no cases will the transmit or receive buffer be reduced
below 68 KB. For a 1 MB NIC the approximate total space for data buffers
is 800 KB. For a 512 KB NIC that number is 300 KB. The default value is
21.</dd>
<dt id="dev.ti._d.stat_ticks"><var class="Va">dev.ti.%d.stat_ticks</var></dt>
<dd>The value, stat ticks, controls the number of clock ticks (of 1
microseconds each) that must elapse before the NIC DMAs the statistics
block to the Host and generates a STATS_UPDATED event. If set to zero then
statistics are never DMAed to the Host. It is recommended that this value
be set to a high enough frequency to not mislead someone reading
statistics refreshes. Several times a second is enough. The default value
is 2000000 (2 seconds).</dd>
</dl>
</section>
<section class="Sh">
<h1 class="Sh" id="IOCTLS"><a class="permalink" href="#IOCTLS">IOCTLS</a></h1>
<p class="Pp">In addition to the standard <a class="Xr">socket(2)</a>
<a class="Xr">ioctl(2)</a> calls implemented by most network drivers, the
<code class="Nm">ti</code> driver also includes a character device interface
that can be used for additional diagnostics, configuration and debugging.
With this character device interface, and a specially patched version of
<a class="Xr">gdb(1)</a> (<span class="Pa">ports/devel/gdb</span>), the user
can debug firmware running on the Tigon board.</p>
<p class="Pp">These ioctls and their arguments are defined in the
<code class="In"><<a class="In">sys/tiio.h</a>></code> header
file.</p>
<dl class="Bl-tag">
<dt id="TIIOCGETSTATS"><a class="permalink" href="#TIIOCGETSTATS"><code class="Dv">TIIOCGETSTATS</code></a></dt>
<dd>Return card statistics DMAed from the card into kernel memory
approximately every 2 seconds. (That time interval can be changed via the
<code class="Dv">TIIOCSETPARAMS</code> ioctl.) The argument is
<var class="Vt">struct ti_stats</var>.</dd>
<dt id="TIIOCGETPARAMS"><a class="permalink" href="#TIIOCGETPARAMS"><code class="Dv">TIIOCGETPARAMS</code></a></dt>
<dd>Get various performance-related firmware parameters that largely affect
how interrupts are coalesced. The argument is <var class="Vt">struct
ti_params</var>.</dd>
<dt id="TIIOCSETPARAMS"><a class="permalink" href="#TIIOCSETPARAMS"><code class="Dv">TIIOCSETPARAMS</code></a></dt>
<dd>Set various performance-related firmware parameters that largely affect
how interrupts are coalesced. The argument is <var class="Vt">struct
ti_params</var>.</dd>
<dt id="TIIOCSETTRACE"><a class="permalink" href="#TIIOCSETTRACE"><code class="Dv">TIIOCSETTRACE</code></a></dt>
<dd>Tell the NIC to trace the requested types of information. The argument is
<var class="Vt">ti_trace_type</var>.</dd>
<dt id="TIIOCGETTRACE"><a class="permalink" href="#TIIOCGETTRACE"><code class="Dv">TIIOCGETTRACE</code></a></dt>
<dd>Dump the trace buffer from the card. The argument is
<var class="Vt">struct ti_trace_buf</var>.</dd>
<dt id="ALT_ATTACH"><a class="permalink" href="#ALT_ATTACH"><code class="Dv">ALT_ATTACH</code></a></dt>
<dd>This ioctl is used for compatibility with Alteon's Solaris driver. They
apparently only have one character interface for debugging, so they have
to tell it which Tigon instance they want to debug. This ioctl is a noop
for <span class="Ux">FreeBSD</span>.</dd>
<dt id="ALT_READ_TG_MEM"><a class="permalink" href="#ALT_READ_TG_MEM"><code class="Dv">ALT_READ_TG_MEM</code></a></dt>
<dd>Read the requested memory region from the Tigon board. The argument is
<var class="Vt">struct tg_mem</var>.</dd>
<dt id="ALT_WRITE_TG_MEM"><a class="permalink" href="#ALT_WRITE_TG_MEM"><code class="Dv">ALT_WRITE_TG_MEM</code></a></dt>
<dd>Write to the requested memory region on the Tigon board. The argument is
<var class="Vt">struct tg_mem</var>.</dd>
<dt id="ALT_READ_TG_REG"><a class="permalink" href="#ALT_READ_TG_REG"><code class="Dv">ALT_READ_TG_REG</code></a></dt>
<dd>Read the requested register from the Tigon board. The argument is
<var class="Vt">struct tg_reg</var>.</dd>
<dt id="ALT_WRITE_TG_REG"><a class="permalink" href="#ALT_WRITE_TG_REG"><code class="Dv">ALT_WRITE_TG_REG</code></a></dt>
<dd>Write to the requested register on the Tigon board. The argument is
<var class="Vt">struct tg_reg</var>.</dd>
</dl>
</section>
<section class="Sh">
<h1 class="Sh" id="FILES"><a class="permalink" href="#FILES">FILES</a></h1>
<dl class="Bl-tag Bl-compact">
<dt><span class="Pa">/dev/ti[0-255]</span></dt>
<dd>Tigon driver character interface.</dd>
</dl>
</section>
<section class="Sh">
<h1 class="Sh" id="DIAGNOSTICS"><a class="permalink" href="#DIAGNOSTICS">DIAGNOSTICS</a></h1>
<dl class="Bl-diag">
<dt>ti%d: couldn't map memory</dt>
<dd>A fatal initialization error has occurred.</dd>
<dt>ti%d: couldn't map interrupt</dt>
<dd>A fatal initialization error has occurred.</dd>
<dt>ti%d: no memory for softc struct!</dt>
<dd>The driver failed to allocate memory for per-device instance information
during initialization.</dd>
<dt>ti%d: failed to enable memory mapping!</dt>
<dd>The driver failed to initialize PCI shared memory mapping. This might
happen if the card is not in a bus-master slot.</dd>
<dt>ti%d: no memory for jumbo buffers!</dt>
<dd>The driver failed to allocate memory for jumbo frames during
initialization.</dd>
<dt>ti%d: bios thinks we're in a 64 bit slot, but we aren't</dt>
<dd>The BIOS has programmed the NIC as though it had been installed in a
64-bit PCI slot, but in fact the NIC is in a 32-bit slot. This happens as
a result of a bug in some BIOSes. This can be worked around on the Tigon
II, but on the Tigon I initialization will fail.</dd>
<dt>ti%d: board self-diagnostics failed!</dt>
<dd>The ROMFAIL bit in the CPU state register was set after system startup,
indicating that the on-board NIC diagnostics failed.</dd>
<dt>ti%d: unknown hwrev</dt>
<dd>The driver detected a board with an unsupported hardware revision. The
<code class="Nm">ti</code> driver supports revision 4 (Tigon 1) and
revision 6 (Tigon 2) chips and has firmware only for those devices.</dd>
<dt>ti%d: watchdog timeout</dt>
<dd>The device has stopped responding to the network, or there is a problem
with the network connection (cable).</dd>
</dl>
</section>
<section class="Sh">
<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE
ALSO</a></h1>
<p class="Pp"><a class="Xr">sendfile(2)</a>, <a class="Xr">altq(4)</a>,
<a class="Xr">arp(4)</a>, <a class="Xr">netintro(4)</a>,
<a class="Xr">ng_ether(4)</a>, <a class="Xr">vlan(4)</a>,
<a class="Xr">ifconfig(8)</a>, <a class="Xr">zero_copy(9)</a></p>
</section>
<section class="Sh">
<h1 class="Sh" id="HISTORY"><a class="permalink" href="#HISTORY">HISTORY</a></h1>
<p class="Pp">The <code class="Nm">ti</code> device driver first appeared in
<span class="Ux">FreeBSD 3.0</span>.</p>
</section>
<section class="Sh">
<h1 class="Sh" id="AUTHORS"><a class="permalink" href="#AUTHORS">AUTHORS</a></h1>
<p class="Pp">The <code class="Nm">ti</code> driver was written by
<span class="An">Bill Paul</span>
<<a class="Mt" href="mailto:wpaul@bsdi.com">wpaul@bsdi.com</a>>. The
header splitting firmware modifications, character
<a class="Xr">ioctl(2)</a> interface and debugging support were written by
<span class="An">Kenneth Merry</span>
<<a class="Mt" href="mailto:ken@FreeBSD.org">ken@FreeBSD.org</a>>.
Initial zero copy support was written by <span class="An">Andrew
Gallatin</span>
<<a class="Mt" href="mailto:gallatin@FreeBSD.org">gallatin@FreeBSD.org</a>>.</p>
</section>
</div>
<table class="foot">
<tr>
<td class="foot-date">November 14, 2011</td>
<td class="foot-os">FreeBSD 15.0</td>
</tr>
</table>
|
