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<table class="head">
<tr>
<td class="head-ltitle">SMP(4)</td>
<td class="head-vol">Device Drivers Manual</td>
<td class="head-rtitle">SMP(4)</td>
</tr>
</table>
<div class="manual-text">
<section class="Sh">
<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1>
<p class="Pp"><code class="Nm">SMP</code> — <span class="Nd">description
of the FreeBSD Symmetric Multi-Processor kernel</span></p>
</section>
<section class="Sh">
<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1>
<p class="Pp"><code class="Cd">options SMP</code></p>
</section>
<section class="Sh">
<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1>
<p class="Pp">The <code class="Nm">SMP</code> kernel implements symmetric
multi-processor support.</p>
<p class="Pp"><code class="Nm">SMP</code> support can be disabled by setting the
loader tunable <var class="Va">kern.smp.disabled</var> to 1.</p>
<p class="Pp">The number of CPUs detected by the system is available in the
read-only sysctl variable <var class="Va">hw.ncpu</var>.</p>
<p class="Pp">The number of online threads per CPU core is available in the
read-only sysctl variable <var class="Va">kern.smp.threads_per_core</var>.
The number of physical CPU cores detected by the system is available in the
read-only sysctl variable <var class="Va">kern.smp.cores</var>.</p>
<p class="Pp"><span class="Ux">FreeBSD</span> allows specific CPUs on a
multi-processor system to be disabled. This can be done using the
<var class="Va">hint.lapic.X.disabled</var> tunable, where X is the APIC ID
of a CPU. Setting this tunable to 1 will result in the corresponding CPU
being disabled.</p>
<p class="Pp"><span class="Ux">FreeBSD</span> supports simultaneous
multithreading on x86 and powerpc platforms. On x86, the logical CPUs can be
disabled by setting the <var class="Va">machdep.hyperthreading_allowed</var>
tunable to zero.</p>
<p class="Pp">The <a class="Xr">sched_ule(4)</a> scheduler implements CPU
topology detection and adjusts the scheduling algorithms to make better use
of modern multi-core CPUs. The sysctl variable
<var class="Va">kern.sched.topology_spec</var> reflects the detected CPU
hardware in a parsable XML format. The top level XML tag is <groups>,
which encloses one or more <group> tags containing data about
individual CPU groups. A CPU group contains CPUs that are detected to be
"close" together, usually by being cores in a single multi-core
processor. Attributes available in a <group> tag are
"level", corresponding to the nesting level of the CPU group and
"cache-level", corresponding to the level of CPU caches shared by
the CPUs in the group. The <group> tag contains the <cpu> and
<flags> tags. The <cpu> tag describes CPUs in the group. Its
attributes are "count", corresponding to the number of CPUs in the
group and "mask", corresponding to the integer binary mask in
which each bit position set to 1 signifies a CPU belonging to the group. The
contents (CDATA) of the <cpu> tag is the comma-delimited list of CPU
indexes (derived from the "mask" attribute). The <flags> tag
contains special tags (if any) describing the relation of the CPUs in the
group. The possible flags are currently "HTT" and "SMT",
corresponding to the various implementations of hardware multithreading. An
example topology_spec output for a system consisting of two quad-core
processors is:</p>
<div class="Bd Pp Li">
<pre><groups>
<group level="1" cache-level="0">
<cpu count="8" mask="0xff">0, 1, 2, 3, 4, 5, 6, 7</cpu>
<flags></flags>
<children>
<group level="2" cache-level="0">
<cpu count="4" mask="0xf">0, 1, 2, 3</cpu>
<flags></flags>
</group>
<group level="2" cache-level="0">
<cpu count="4" mask="0xf0">4, 5, 6, 7</cpu>
<flags></flags>
</group>
</children>
</group>
</groups></pre>
</div>
<p class="Pp">This information is used internally by the kernel to schedule
related tasks on CPUs that are closely grouped together.</p>
</section>
<section class="Sh">
<h1 class="Sh" id="COMPATIBILITY"><a class="permalink" href="#COMPATIBILITY">COMPATIBILITY</a></h1>
<p class="Pp">Support for multi-processor systems is present for all Tier-1 and
Tier-2 architectures on <span class="Ux">FreeBSD</span>. Currently, this
includes x86, powerpc, mips, arm and arm64. Support is enabled using
<code class="Cd">options SMP</code>. It is permissible to use the SMP kernel
configuration on non-SMP hardware.</p>
</section>
<section class="Sh">
<h1 class="Sh" id="I386_NOTES"><a class="permalink" href="#I386_NOTES">I386
NOTES</a></h1>
<p class="Pp">For i386 systems, the <code class="Nm">SMP</code> kernel supports
motherboards that follow the Intel MP specification, version 1.4. In
addition to <code class="Cd">options SMP</code>, i386 also requires
<code class="Cd">device apic</code>. The <a class="Xr">mptable(1)</a>
command may be used to view the status of multi-processor support.</p>
</section>
<section class="Sh">
<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE
ALSO</a></h1>
<p class="Pp"><a class="Xr">cpuset(1)</a>, <a class="Xr">mptable(1)</a>,
<a class="Xr">sched_4bsd(4)</a>, <a class="Xr">sched_ule(4)</a>,
<a class="Xr">loader(8)</a>, <a class="Xr">sysctl(8)</a>,
<a class="Xr">condvar(9)</a>, <a class="Xr">msleep(9)</a>,
<a class="Xr">mtx_pool(9)</a>, <a class="Xr">mutex(9)</a>,
<a class="Xr">rwlock(9)</a>, <a class="Xr">sema(9)</a>,
<a class="Xr">sx(9)</a></p>
</section>
<section class="Sh">
<h1 class="Sh" id="HISTORY"><a class="permalink" href="#HISTORY">HISTORY</a></h1>
<p class="Pp">The <code class="Nm">SMP</code> kernel's early history is not
(properly) recorded. It was developed in a separate CVS branch until April
26, 1997, at which point it was merged into 3.0-current. By this date
3.0-current had already been merged with Lite2 kernel code.</p>
<p class="Pp"><span class="Ux">FreeBSD 5.0</span> introduced support for a host
of new synchronization primitives, and a move towards fine-grained kernel
locking rather than reliance on a Giant kernel lock. The SMPng Project
relied heavily on the support of BSDi, who provided reference source code
from the fine-grained SMP implementation found in
<span class="Ux">BSD/OS</span>.</p>
<p class="Pp"><span class="Ux">FreeBSD 5.0</span> also introduced support for
SMP on the sparc64 architecture.</p>
</section>
<section class="Sh">
<h1 class="Sh" id="AUTHORS"><a class="permalink" href="#AUTHORS">AUTHORS</a></h1>
<p class="Pp"><span class="An">Steve Passe</span>
<<a class="Mt" href="mailto:fsmp@FreeBSD.org">fsmp@FreeBSD.org</a>></p>
</section>
<section class="Sh">
<h1 class="Sh" id="CAVEATS"><a class="permalink" href="#CAVEATS">CAVEATS</a></h1>
<p class="Pp">The <var class="Va">kern.smp.threads_per_core</var> and
<var class="Va">kern.smp.cores</var> sysctl variables are provided as a
best-effort guess. If an architecture or platform adds SMT and
<span class="Ux">FreeBSD</span> has not yet implemented detection, the
reported values may be inaccurate. In this case,
<var class="Va">kern.smp.threads_per_core</var> will report
<code class="Dv">1</code> and <var class="Va">kern.smp.cores</var> will
report the same value as <var class="Va">hw.ncpu</var>.</p>
</section>
</div>
<table class="foot">
<tr>
<td class="foot-date">January 4, 2019</td>
<td class="foot-os">FreeBSD 15.0</td>
</tr>
</table>
|
