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diff --git a/static/netbsd/man4/umcpmio.4 4.html b/static/netbsd/man4/umcpmio.4 4.html deleted file mode 100644 index a34f6209..00000000 --- a/static/netbsd/man4/umcpmio.4 4.html +++ /dev/null @@ -1,479 +0,0 @@ -<table class="head"> - <tr> - <td class="head-ltitle">UMCPMIO(4)</td> - <td class="head-vol">Device Drivers Manual</td> - <td class="head-rtitle">UMCPMIO(4)</td> - </tr> -</table> -<div class="manual-text"> -<section class="Sh"> -<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1> -<p class="Pp"><code class="Nm">umcpmio</code> — - <span class="Nd">Microchip Technologies MCP2210, MCP2221/MCP2221A multi-io - bridge</span></p> -</section> -<section class="Sh"> -<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1> -<p class="Pp"><code class="Cd">umcpmio* at uhidev? reportid ?</code> - <br/> - <code class="Cd">gpio* at gpiobus?</code> - <br/> - <code class="Cd">spi* at umcpmio?</code> - <br/> - <code class="Cd">iic* at umcpmio? # or</code> - <br/> - <code class="Cd">iic* at i2cbus?</code></p> -</section> -<section class="Sh"> -<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1> -<p class="Pp">The <code class="Nm">umcpmio</code> driver provides support for - the MCP2210 and MCP2221/MCP2221A multi-io bridge chips. The MCP2210 provides - 9 simple gpio pins with multiple functions that attach as a - <a class="Xr">gpio(4)</a> device and the ability to do SPI via the - <a class="Xr">spi(4)</a> framework. The pins function as - <a class="Xr">gpio(4)</a> pins or as chip select for the - <a class="Xr">spi(4)</a> function. The MCP2221 provides 4 simple gpio pins - with multiple functions that attach as a <a class="Xr">gpio(4)</a> device, - an I2C port that attaches as an <a class="Xr">iic(4)</a> device and a UART - serial port that attaches using <a class="Xr">umodem(4)</a> as a normal - <a class="Xr">ucom(4)</a> - <span class="Pa">ttyU</span><var class="Ar">*</var> device. The UART is - presented as one USB function, while the GPIO and I2C pins are presented as - a second HID USB function.</p> -<section class="Ss"> -<h2 class="Ss" id="GPIO_on_the_MCP2210"><a class="permalink" href="#GPIO_on_the_MCP2210">GPIO - on the MCP2210</a></h2> -<p class="Pp">There are 9 basic gpio pins available with the following - functions:</p> -<div class="Bd Pp"> -<table class="tbl" style="border-style: solid;"> - <tr> - <td style="border-right-style: solid;">Pin</td> - <td style="border-right-style: solid;">GPIO</td> - <td style="border-right-style: solid;">ALT0</td> - <td style="border-right-style: solid;">ALT3</td> - <td style="border-right-style: solid;">ALT4</td> - <td style="border-right-style: solid;">ALT5</td> - <td>ALT6</td> - </tr> - <tr> - </tr> - <tr> - <td style="border-right-style: solid;">GP0</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">CS</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td>-</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP1</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">CS</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td>-</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP2</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">CS</td> - <td style="border-right-style: solid;">SSPND</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td>-</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP3</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">CS</td> - <td style="border-right-style: solid;">SPI activity</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td>-</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP4</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">CS</td> - <td style="border-right-style: solid;">LOWPWR</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td>-</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP5</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">CS</td> - <td style="border-right-style: solid;">USBCFG</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td>-</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP6</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">CS</td> - <td style="border-right-style: solid;">Falling edge</td> - <td style="border-right-style: solid;">Rising edge</td> - <td style="border-right-style: solid;">Low pulse</td> - <td>High pulse</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP7</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">CS</td> - <td style="border-right-style: solid;">Release ACK</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td>-</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP8</td> - <td style="border-right-style: solid;">I</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">Release REQ</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td>-</td> - </tr> -</table> -</div> -<p class="Pp">The IRQ counter on GP6 can be read with a - <a class="Xr">sysctl(8)</a>. The manor in which the GP6 IRQ counter detects - the event is configured by setting it to ALT3 to ALT6. GP8 is only an input - pin when configured for gpio purposes. The chip select, CS, function will be - enabled automatically if a request to use the <a class="Xr">spi(4)</a> - framework is performed that requests the use of the associated chip select - pin.</p> -</section> -<section class="Ss"> -<h2 class="Ss" id="SPI"><a class="permalink" href="#SPI">SPI</a></h2> -<p class="Pp">The MCP2210 supports a basic SPI engine via the - <a class="Xr">spi(4)</a> framework. Various SPI delays are configured with - <a class="Xr">umcpmioctl(8)</a>.</p> -<p class="Pp">The SPI engine on the MCP2210 only functions in full duplex mode. - That is, it is not possible to just send bytes without also receiving them. - The driver will queue up any recived bytes that might have come though on a - transaction and present them to the upstream layer from the queue when - asked. This queue will be cleared out for a particular slave address when a - configuration call is made against a particular slave device.</p> -<p class="Pp">Upon making a configuration call to the - <code class="Nm">umcpmio</code> driver, the driver will set the pin - associated with the requested slave address to ALT0. Since the - <a class="Xr">spi(4)</a> framework does not support the notion of a session, - this pin will never be reset by the <code class="Nm">umcpmio</code> driver. - Further, it is entirely possible to use <a class="Xr">gpioctl(8)</a> to - change the pin assignment in such a way that SPI no longer works as it is - also not possible to know if a pin is in use at any moment in time.</p> -</section> -<section class="Ss"> -<h2 class="Ss" id="EEPROM"><a class="permalink" href="#EEPROM">EEPROM</a></h2> -<p class="Pp">The MCP2210 has 256 bytes of EEPROM available via the - <span class="Pa">/dev/umcpmio0EEP</span> device. Random reads and writes may - be performed against this device, but there can only one one opener at a - time.</p> -</section> -<section class="Ss"> -<h2 class="Ss" id="GPIO_on_the_MCP2221"><a class="permalink" href="#GPIO_on_the_MCP2221">GPIO - on the MCP2221</a></h2> -<p class="Pp">There are 4 basic gpio pins available with the following - functions:</p> -<div class="Bd Pp"> -<table class="tbl" style="border-style: solid;"> - <tr> - <td style="border-right-style: solid;">Pin</td> - <td style="border-right-style: solid;">GPIO</td> - <td style="border-right-style: solid;">ALT0</td> - <td style="border-right-style: solid;">ALT1</td> - <td style="border-right-style: solid;">ALT2</td> - <td>ALT3</td> - </tr> - <tr> - </tr> - <tr> - <td style="border-right-style: solid;">GP0</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">UART RX</td> - <td style="border-right-style: solid;">-</td> - <td style="border-right-style: solid;">-</td> - <td>SSPND</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP1</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">ADC1</td> - <td style="border-right-style: solid;">UART TX</td> - <td style="border-right-style: solid;">IRQ</td> - <td>Clock output</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP2</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">ADC2</td> - <td style="border-right-style: solid;">DAC1</td> - <td style="border-right-style: solid;">-</td> - <td>USBCFG</td> - </tr> - <tr> - <td style="border-right-style: solid;">GP3</td> - <td style="border-right-style: solid;">I/O</td> - <td style="border-right-style: solid;">ADC3</td> - <td style="border-right-style: solid;">DAC2</td> - <td style="border-right-style: solid;">-</td> - <td>I2C activity</td> - </tr> -</table> -</div> -<p class="Pp">ADC1, ADC2 and ADC3 are independent of each other and each 10 bits - in length. To utilize one of the ADC pins, an <a class="Xr">open(2)</a> is - performed against <span class="Pa">/dev/umcpmio0GP1</span>, - <span class="Pa">/dev/umcpmio0GP2</span> or - <span class="Pa">/dev/umcpmio0GP3</span> with only the - <code class="Dv">O_RDONLY</code> flag set. Reads against the open file - descriptor will produce <var class="Vt">uint16_t</var> values.</p> -<p class="Pp">There is actually only one DAC present in the chip, but it is - mirrored to GP2 and GP3 if the pin is set to ALT1. The DAC is 5 bits in - length, and to use it, an <a class="Xr">open(2)</a> is performed against - <span class="Pa">/dev/umcpmio0GP2</span> or - <span class="Pa">/dev/umcpmio0GP3</span> with only the - <code class="Dv">O_WRONLY</code> flag set. Writes of - <var class="Vt">uint8_t</var> bytes to the file descriptor will result in an - analog signal being created on the output pin.</p> -<p class="Pp">The clock output is derived from the USB clock of 48MHz. The duty - cycle and clock divider can be adjusted with <a class="Xr">sysctl(8)</a> - variables. To utilize GP1 as the clock output, the ALT3 function can be set - with <a class="Xr">gpioctl(8)</a> command.</p> -</section> -<section class="Ss"> -<h2 class="Ss" id="I2C"><a class="permalink" href="#I2C">I2C</a></h2> -<p class="Pp">The MCP2221/MCP2221A supports a hardware I2C port with a simple - scripting engine. When the driver attaches, the I2C speed is set to 100Kb/s. - The ability to perform an I2C READ without a STOP is not supported by the - MCP2221/MCP2221A engine and the driver turns a READ without STOP into a READ - with STOP. This behavior is just an attempt to allow a device to function, - and it may not work for any particular device. In particular, it is known - that the <a class="Xr">ds2482ow(4)</a> device will not work as expected.</p> -<p class="Pp">The MCP2221/MCP2221A chip will automatically detect and deal with - a device that uses I2C clock stretching.</p> -</section> -<section class="Ss"> -<h2 class="Ss" id="UART"><a class="permalink" href="#UART">UART</a></h2> -<p class="Pp">The UART on the MCP2221/MCP2221A utilizes the - <a class="Xr">umodem(4)</a> driver. The UART function of the chip only - supports 8-N-1 communications.</p> -</section> -</section> -<section class="Sh"> -<h1 class="Sh" id="SYSCTL_VARIABLES"><a class="permalink" href="#SYSCTL_VARIABLES">SYSCTL - VARIABLES</a></h1> -<p class="Pp">The following <a class="Xr">sysctl(3)</a> variables are - provided:</p> -<p class="Pp"></p> -<dl class="Bl-tag Bl-compact"> - <dt id="hw.umcpmio0.debug"><a class="permalink" href="#hw.umcpmio0.debug"><code class="Li">hw.umcpmio0.debug</code></a></dt> - <dd style="width: auto;"> </dd> - <dt id="hw.umcpmio0.dump_buffers"><a class="permalink" href="#hw.umcpmio0.dump_buffers"><code class="Li">hw.umcpmio0.dump_buffers</code></a></dt> - <dd>If <code class="Dv">UMCPMIO_DEBUG</code> is defined, additional debugging - output can be enabled. - <p class="Pp"></p> - </dd> - <dt id="hw.umcpmio0.response_wait"><a class="permalink" href="#hw.umcpmio0.response_wait"><code class="Li">hw.umcpmio0.response_wait</code></a></dt> - <dd style="width: auto;"> </dd> - <dt id="hw.umcpmio0.response_errcnt"><a class="permalink" href="#hw.umcpmio0.response_errcnt"><code class="Li">hw.umcpmio0.response_errcnt</code></a></dt> - <dd>This is how long the driver will wait for a HID response to come back from - the chip. This variable is in microseconds and defaults to 2500. The - driver will only allow <code class="Li">response_errcnt</code> number of - errors when waiting for a response from a HID report. This includes - timeouts due to exceeding <code class="Li">response_wait</code>.</dd> -</dl> -<section class="Ss"> -<h2 class="Ss" id="MCP2210"><a class="permalink" href="#MCP2210">MCP2210</a></h2> -<dl class="Bl-tag Bl-compact"> - <dt id="hw.umcpmio0.spi.verbose"><a class="permalink" href="#hw.umcpmio0.spi.verbose"><code class="Li">hw.umcpmio0.spi.verbose</code></a></dt> - <dd>Enable or disable verbose connection reset messages when there are errors. - <p class="Pp"></p> - </dd> - <dt id="hw.umcpmio0.spi.busy_delay"><a class="permalink" href="#hw.umcpmio0.spi.busy_delay"><code class="Li">hw.umcpmio0.spi.busy_delay</code></a></dt> - <dd>When the MCP2210 is busy, use busy_delay number of ms to wait before - trying the operation again. The default is 0 as there usually will not be - any reason is wait. - <p class="Pp"></p> - </dd> - <dt id="hw.umcpmio0.spi.retry_busy_chipdrain"><a class="permalink" href="#hw.umcpmio0.spi.retry_busy_chipdrain"><code class="Li">hw.umcpmio0.spi.retry_busy_chipdrain</code></a></dt> - <dd style="width: auto;"> </dd> - <dt id="hw.umcpmio0.spi.retry_busy_transfer"><a class="permalink" href="#hw.umcpmio0.spi.retry_busy_transfer"><code class="Li">hw.umcpmio0.spi.retry_busy_transfer</code></a></dt> - <dd>The number of times to retry either a chipdrain or transfer operation. A - chipdrain is used when the chip has sent back data, but the upstream is - not ready for it yet. A transfer is a normal SPI transfer. - <p class="Pp"></p> - </dd> - <dt id="hw.umcpmio0.gpio.counter"><a class="permalink" href="#hw.umcpmio0.gpio.counter"><code class="Li">hw.umcpmio0.gpio.counter</code></a></dt> - <dd style="width: auto;"> </dd> - <dt id="hw.umcpmio0.gpio.reset_counter"><a class="permalink" href="#hw.umcpmio0.gpio.reset_counter"><code class="Li">hw.umcpmio0.gpio.reset_counter</code></a></dt> - <dd>When the GP6 pin is set to ALT3 to ALT6, this sysctl reads back the - counter. To reset the counter write 1 to the reset_counter sysctl. The - counter will also be reset if any pin changes from a input or output pin - to one of the ALT functions or vise versa. The trigger for this could be - the use of <a class="Xr">gpioctl(8)</a> or if the pin is changed to become - a CS from a general I/O pin for the <a class="Xr">spi(4)</a> - infrastructure.</dd> -</dl> -</section> -<section class="Ss"> -<h2 class="Ss" id="MCP2221"><a class="permalink" href="#MCP2221">MCP2221/MCP2221A</a></h2> -<dl class="Bl-tag Bl-compact"> - <dt id="hw.umcpmio0.i2c.reportreadnostop"><a class="permalink" href="#hw.umcpmio0.i2c.reportreadnostop"><code class="Li">hw.umcpmio0.i2c.reportreadnostop</code></a></dt> - <dd>Report on the console if a driver attempts to use an I2C READ without - STOP. A READ without STOP is not supported by the MCP2221/MCP2221A I2C - engine and will be turned into a READ with STOP by the driver. - <p class="Pp"></p> - </dd> - <dt id="hw.umcpmio0.i2c.busy_delay"><a class="permalink" href="#hw.umcpmio0.i2c.busy_delay"><code class="Li">hw.umcpmio0.i2c.busy_delay</code></a></dt> - <dd>The driver checks in a number of cases if the I2C engine is busy and will - wait for <code class="Li">busy_delay</code> microseconds before checking - again. - <p class="Pp"></p> - </dd> - <dt id="hw.umcpmio0.i2c.retry_busy_read"><a class="permalink" href="#hw.umcpmio0.i2c.retry_busy_read"><code class="Li">hw.umcpmio0.i2c.retry_busy_read</code></a></dt> - <dd>The number of times to try to do an I2C READ when the engine is busy. - <p class="Pp"></p> - </dd> - <dt id="hw.umcpmio0.i2c.retry_busy_write"><a class="permalink" href="#hw.umcpmio0.i2c.retry_busy_write"><code class="Li">hw.umcpmio0.i2c.retry_busy_write</code></a></dt> - <dd>The number of times to try to do an I2C WRITE when the engine is busy. - <p class="Pp"></p> - </dd> - <dt id="hw.umcpmio0.gpio.clock_duty_cycle"><a class="permalink" href="#hw.umcpmio0.gpio.clock_duty_cycle"><code class="Li">hw.umcpmio0.gpio.clock_duty_cycle</code></a></dt> - <dd style="width: auto;"> </dd> - <dt id="hw.umcpmio0.gpio.clock_divider"><a class="permalink" href="#hw.umcpmio0.gpio.clock_divider"><code class="Li">hw.umcpmio0.gpio.clock_divider</code></a></dt> - <dd>When GP1 is configured to use function ALT3, it will output a clock pulse. - The valid values for <code class="Li">clock_duty_cycle</code> are - ‘<code class="Li">75%</code>’, - ‘<code class="Li">50%</code>’, - ‘<code class="Li">25%</code>’, and - ‘<code class="Li">0%</code>’. That is, 75% of the time a - high and 25% of the time a low will be present on the GP1 pin. The valid - values for <code class="Li">clock_divider</code> are - ‘<code class="Li">375kHz</code>’, - ‘<code class="Li">750kHz</code>’, - ‘<code class="Li">1.5MHz</code>’, - ‘<code class="Li">3MHz</code>’, - ‘<code class="Li">6MHz</code>’, - ‘<code class="Li">12MHz</code>’, and - ‘<code class="Li">24MHz</code>’. - <p class="Pp"></p> - </dd> - <dt id="hw.umcpmio0.dac.vref"><a class="permalink" href="#hw.umcpmio0.dac.vref"><code class="Li">hw.umcpmio0.dac.vref</code></a></dt> - <dd style="width: auto;"> </dd> - <dt id="hw.umcpmio0.adc.vref"><a class="permalink" href="#hw.umcpmio0.adc.vref"><code class="Li">hw.umcpmio0.adc.vref</code></a></dt> - <dd>Sets the VREF value for the DAC or ADC. The valid values are - ‘<code class="Li">4.096V</code>’, - ‘<code class="Li">2.048V</code>’, - ‘<code class="Li">1.024V</code>’, - ‘<code class="Li">OFF</code>’, and - ‘<code class="Li">VDD</code>’.</dd> -</dl> -</section> -</section> -<section class="Sh"> -<h1 class="Sh" id="FILES"><a class="permalink" href="#FILES">FILES</a></h1> -<dl class="Bl-tag Bl-compact"> - <dt><span class="Pa">/dev/umcpmio0ctl</span></dt> - <dd>A control device for the chip instance that allows for a number of IOCTLs. - <p class="Pp"></p> - </dd> - <dt><span class="Pa">/dev/umcpmio0GP1</span></dt> - <dd style="width: auto;"> </dd> - <dt><span class="Pa">/dev/umcpmio0GP2</span></dt> - <dd style="width: auto;"> </dd> - <dt><span class="Pa">/dev/umcpmio0GP3</span></dt> - <dd>Device files that allow access to the ADC or DAC functions of the - associated gpio pin on the MCP2221/MCP2221A. - <p class="Pp"></p> - </dd> - <dt><span class="Pa">/dev/umcpmio0EEP</span></dt> - <dd>Device file that interacts with the EEPROM on the MCP2210.</dd> -</dl> -</section> -<section class="Sh"> -<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE - ALSO</a></h1> -<p class="Pp"><a class="Xr">gpio(4)</a>, <a class="Xr">iic(4)</a>, - <a class="Xr">spi(4)</a>, <a class="Xr">sysctl(8)</a>, - <a class="Xr">umcpmioctl(8)</a></p> -</section> -<section class="Sh"> -<h1 class="Sh" id="HISTORY"><a class="permalink" href="#HISTORY">HISTORY</a></h1> -<p class="Pp">The <code class="Nm">umcpmio</code> driver first appeared in - <span class="Ux">NetBSD 11.0</span>. Support for the MCP2210 was added in - <span class="Ux">NetBSD 12.0</span>.</p> -</section> -<section class="Sh"> -<h1 class="Sh" id="AUTHORS"><a class="permalink" href="#AUTHORS">AUTHORS</a></h1> -<p class="Pp">The <code class="Nm">umcpmio</code> driver was written by - <span class="An">Brad Spencer</span> - <<a class="Mt" href="mailto:brad@anduin.eldar.org">brad@anduin.eldar.org</a>>.</p> -</section> -<section class="Sh"> -<h1 class="Sh" id="BUGS"><a class="permalink" href="#BUGS">BUGS</a></h1> -<p class="Pp">The gpio pins on the these two chips are very slow and one should - not expect to be able to rapidly change their state. Even if the problem - mentioned below did not exist, one should not expect to be able to use any - of the gpio bit banger drivers such as <a class="Xr">gpioiic(4)</a> or - <a class="Xr">gpioow(4)</a>.</p> -<p class="Pp">The interrupt function of the MCP2221/MCP2221A on GP1 cannot - currently be used because it is currently not possible to attach through the - driver. There may be two possible problems going on:</p> -<ul class="Bl-bullet"> - <li>The <a class="Xr">gpio(4)</a> framework runs at - <code class="Dv">IPL_VM</code> with a spin lock and when it attempts to - establish an interrupt that uses the gpio from - <code class="Nm">umcpmio</code>, calls are made into the USB stack that - will want to wait in a way that is not allowed while holding a spin - lock.</li> - <li><a class="Xr">autoconf(9)</a> runs with - <code class="Dv">KERNEL_LOCK</code> and during the attachment, this lock - is held when calls are made into the USB stack that will cause a wait that - is not allowed while holding <code class="Dv">KERNEL_LOCK</code>.</li> -</ul> -<p class="Pp">Either or both of these may be going on, but the end result is - that the kernel will panic while attempting to perform a USB transfer while - another driver is attempting to attach through - <code class="Nm">umcpmio</code>.</p> -<p class="Pp">Likewise, a ‘<code class="Li">gpioctl gpio1 attach - ...</code>’ type call will also panic for the same reason.</p> -<p class="Pp">The end result is that <a class="Xr">gpioirq(4)</a>, - <a class="Xr">gpiopps(4)</a> and <a class="Xr">gpioow(4)</a> will not work - with the gpio from <code class="Nm">umcpmio</code>.</p> -<p class="Pp">Please note that the <code class="Nm">umcpmio</code> driver itself - can use the USB stack during attachment and there does not appear to be any - problems using the GPIO pins or setting GPIO pin configurations. It is only - when the driver is a target during another driver's attachment that there is - a problem.</p> -<p class="Pp">The ability to set or change values in most of the chip's FLASH - memory is not supported. This includes changing the configuration protection - password. Likewise, support for entering the configuration protection - password does not exist, should a particular chip have password protection - enabled.</p> -<p class="Pp">On the MCP2210, changing any pin from INPUT or OUTPUT to ALTx or - vise versa has to rewrite some of the setting for all pins. A consequence of - doing this is that for a very brief time, the default direction and values - will be set on all pins. This has the biggest impact on OUTPUT pins which - might generate a small pulse. This behavior really can't be avoided as there - is no way with the MCP2210 to write the configuration of just one pin at a - time. For this same reason, the IRQ event counter will be reset if any pin - switches from INPUT or OUTPUT to ALTx or vise versa.</p> -<p class="Pp">The MCP2210 supports active high or active low CS signals per CS. - However, the <a class="Xr">spi(4)</a> framework does not have any way to - specify the direction of the CS signal, so the only SPI CS signal supported - is the usual active low signal.</p> -</section> -</div> -<table class="foot"> - <tr> - <td class="foot-date">November 13, 2025</td> - <td class="foot-os">NetBSD 10.1</td> - </tr> -</table> |