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diff --git a/static/netbsd/man4/man4.x86/ichlpcib.4 3.html b/static/netbsd/man4/man4.x86/ichlpcib.4 3.html deleted file mode 100644 index 985e08bf..00000000 --- a/static/netbsd/man4/man4.x86/ichlpcib.4 3.html +++ /dev/null @@ -1,95 +0,0 @@ -<table class="head"> - <tr> - <td class="head-ltitle">ICHLPCIB(4)</td> - <td class="head-vol">Device Drivers Manual (x86)</td> - <td class="head-rtitle">ICHLPCIB(4)</td> - </tr> -</table> -<div class="manual-text"> -<section class="Sh"> -<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1> -<p class="Pp"><code class="Nm">ichlpcib</code> — <span class="Nd">Intel - ICH LPC Interface Bridge</span></p> -</section> -<section class="Sh"> -<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1> -<p class="Pp"><code class="Cd">ichlpcib* at pci? dev ? function ?</code> - <br/> - <code class="Cd">fwhrng* at ichlpcib?</code> - <br/> - <code class="Cd">hpet0 at ichlpcib?</code> - <br/> - <code class="Cd">isa0 at ichlpcib?</code> - <br/> - <code class="Cd">gpio* at ichlpcib?</code> - <br/> - <code class="Cd">tco* at ichlpcib?</code></p> -</section> -<section class="Sh"> -<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1> -<p class="Pp">The <code class="Nm">ichlpcib</code> driver supports the Intel ICH - LPC Interface Bridges on compatible chipsets. Supported functions - include:</p> -<ul class="Bl-bullet"> - <li>Watchdog timer. The watchdog timer may be configured for a 1 seconds (on - ICH6 or newer) and 2 seconds (on ICH5 or older) min period and for a 23 - seconds (on ICH5 or older) or 367 seconds max period (on ICH6 or newer). - <p class="Pp">Prior to <span class="Ux">NetBSD 8.0</span>, the - <a class="Xr">x86/tco(4)</a> watchdog timer was included as part of the - <code class="Nm">ichlpcib</code> driver, and did not require explicit - configuration.</p> - </li> - <li>Power Management timer. A 24-bit timer available to be used by the - timecounters framework.</li> - <li>SpeedStep. In some older systems the SpeedStep function is also available, - and can be used to switch between high and low frequency (to reduce power - consumption) via the <code class="Li">machdep.speedstep_state</code> - <a class="Xr">sysctl(8)</a> node. A value of 0 will use the low frequency - (low power) and a 1 will enable the high frequency (full power).</li> - <li>General Purpose Input/Output. The ICH provides up to 64 I/O pins which can - be accessed through the <a class="Xr">gpio(4)</a> framework.</li> -</ul> -</section> -<section class="Sh"> -<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE - ALSO</a></h1> -<p class="Pp"><a class="Xr">gpio(4)</a>, <a class="Xr">x86/est(4)</a>, - <a class="Xr">x86/fwhrng(4)</a>, <a class="Xr">x86/hpet(4)</a>, - <a class="Xr">x86/ioapic(4)</a>, <a class="Xr">x86/tco(4)</a>, - <a class="Xr">sysctl(8)</a>, <a class="Xr">wdogctl(8)</a></p> -<p class="Pp"><cite class="Rs"><span class="RsA">Intel Corporation</span>, - <span class="RsT">Intel I/O Controller Hub 6 (ICH6) Family</span>, - <a class="RsU" href="http://www.intel.com/assets/pdf/datasheet/301473.pdf">http://www.intel.com/assets/pdf/datasheet/301473.pdf</a>, - <span class="RsD">January, 2005</span>.</cite></p> -<p class="Pp"><cite class="Rs"><span class="RsA">Intel Corporation</span>, - <span class="RsT">Intel I/O Controller Hub 7 (ICH7) Family</span>, - <a class="RsU" href="http://www.intel.com/Assets/PDF/datasheet/307013.pdf">http://www.intel.com/Assets/PDF/datasheet/307013.pdf</a>, - <span class="RsD">April, 2007</span>.</cite></p> -<p class="Pp"><cite class="Rs"><span class="RsA">Intel Corporation</span>, - <span class="RsT">Intel I/O Controller Hub 8 (ICH8) Family</span>, - <a class="RsU" href="http://www.intel.com/assets/pdf/datasheet/313056.pdf">http://www.intel.com/assets/pdf/datasheet/313056.pdf</a>, - <span class="RsD">May, 2007</span>.</cite></p> -<p class="Pp"><cite class="Rs"><span class="RsA">Intel Corporation</span>, - <span class="RsT">Using the Intel ICH Family Watchdog Timer (WDT)</span>, - <a class="RsU" href="ftp://download.intel.com/design/chipsets/applnots/29227301.pdf">ftp://download.intel.com/design/chipsets/applnots/29227301.pdf</a>, - <span class="RsD">September, 2002</span>.</cite></p> -</section> -<section class="Sh"> -<h1 class="Sh" id="HISTORY"><a class="permalink" href="#HISTORY">HISTORY</a></h1> -<p class="Pp">The <code class="Nm">ichlpcib</code> driver first appeared in - <span class="Ux">NetBSD 3.0</span>.</p> -</section> -<section class="Sh"> -<h1 class="Sh" id="AUTHORS"><a class="permalink" href="#AUTHORS">AUTHORS</a></h1> -<p class="Pp">The <code class="Nm">ichlpcib</code> driver was written by - <span class="An">Minoura Makoto</span> and - <br/> - <span class="An">Matthew R. Green</span>.</p> -</section> -</div> -<table class="foot"> - <tr> - <td class="foot-date">February 17, 2017</td> - <td class="foot-os">NetBSD 10.1</td> - </tr> -</table> |