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+<table class="head">
+ <tr>
+ <td class="head-ltitle">SUME(4)</td>
+ <td class="head-vol">Device Drivers Manual (amd64)</td>
+ <td class="head-rtitle">SUME(4)</td>
+ </tr>
+</table>
+<div class="manual-text">
+<section class="Sh">
+<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1>
+<p class="Pp"><code class="Nm">sume</code> &#x2014; <span class="Nd">NetFPGA
+ SUME 4x10Gb Ethernet driver</span></p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1>
+<p class="Pp">To compile this driver into the kernel, place the following lines
+ in your kernel configuration file:</p>
+<div class="Bd Pp Bd-indent"><code class="Cd">device sume</code></div>
+<p class="Pp">Alternatively, to load the driver as a module at boot time, place
+ the following line in <a class="Xr">loader.conf(5)</a>:</p>
+<div class="Bd Pp Bd-indent Li">
+<pre>if_sume_load=&quot;YES&quot;</pre>
+</div>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1>
+<p class="Pp">The <code class="Nm">sume</code> driver provides support for
+ NetFPGA SUME Virtex-7 FPGA Development Board with the reference NIC
+ bitstream loaded onto it. The HDL design for the reference NIC project uses
+ the RIFFA based DMA engine to communicate with the host machine over PCIe.
+ Every packet is transmitted to / from the board via a single DMA
+ transaction, taking up to two or three interrupts per one transaction which
+ yields low performance.</p>
+<p class="Pp">There is no support for Jumbo frames as the hardware is capable of
+ dealing only with frames with maximum size of 1514 bytes. The hardware does
+ not support multicast filtering, provides no checksums, and offers no other
+ offloading.</p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE
+ ALSO</a></h1>
+<p class="Pp"><a class="Xr">arp(4)</a>, <a class="Xr">netgraph(4)</a>,
+ <a class="Xr">netintro(4)</a>, <a class="Xr">ng_ether(4)</a>,
+ <a class="Xr">vlan(4)</a>, <a class="Xr">ifconfig(8)</a></p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="AUTHORS"><a class="permalink" href="#AUTHORS">AUTHORS</a></h1>
+<p class="Pp">The Linux <code class="Nm">sume</code> driver was originally
+ written by <span class="An">Bjoern A. Zeeb</span>. The
+ <span class="Ux">FreeBSD version</span> and this manual page were written by
+ <span class="An">Denis Salopek</span> as a GSoC project. More information
+ about the project can be found here:
+ <span class="Pa">https://wiki.freebsd.org/SummerOfCode2020Projects/NetFPGA_SUME_Driver</span></p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="BUGS"><a class="permalink" href="#BUGS">BUGS</a></h1>
+<p class="Pp">The reference NIC hardware design provides no mechanism for
+ quiescing inbound traffic from interfaces configured as DOWN. All packets
+ from administratively disabled interfaces are transferred to main memory,
+ leaving the driver with the task of dropping such packets, thus consuming
+ PCI bandwidth, interrupts and CPU cycles in vain.</p>
+<p class="Pp">Pre-built FPGA bitstream from the NetFPGA project may not work
+ correctly. At higher RX packet rates, the newly incoming packets can
+ overwrite the ones in an internal FIFO so the packets would arrive in main
+ memory corrupted, until a physical reset of the board.</p>
+<p class="Pp">Occasionally, the driver can get stuck in a non-IDLE TX state due
+ to a missed interrupt. The driver includes a watchdog function which
+ monitors for such a condition and resets the board automatically. For more
+ details, visit the NetFPGA SUME project site.</p>
+</section>
+</div>
+<table class="foot">
+ <tr>
+ <td class="foot-date">August 30, 2020</td>
+ <td class="foot-os">FreeBSD 15.0</td>
+ </tr>
+</table>