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diff --git a/static/freebsd/man4/rl.4 3.html b/static/freebsd/man4/rl.4 3.html new file mode 100644 index 00000000..96a9ccb6 --- /dev/null +++ b/static/freebsd/man4/rl.4 3.html @@ -0,0 +1,221 @@ +<table class="head"> + <tr> + <td class="head-ltitle">RL(4)</td> + <td class="head-vol">Device Drivers Manual</td> + <td class="head-rtitle">RL(4)</td> + </tr> +</table> +<div class="manual-text"> +<section class="Sh"> +<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1> +<p class="Pp"><code class="Nm">rl</code> — <span class="Nd">Realtek + 8129/8139 Fast Ethernet device driver</span></p> +</section> +<section class="Sh"> +<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1> +<p class="Pp">To compile this driver into the kernel, place the following lines + in your kernel configuration file:</p> +<div class="Bd Pp Bd-indent"><code class="Cd">device miibus</code> +<br/> +<code class="Cd">device rl</code></div> +<p class="Pp">Alternatively, to load the driver as a module at boot time, place + the following line in <a class="Xr">loader.conf(5)</a>:</p> +<div class="Bd Pp Bd-indent Li"> +<pre>if_rl_load="YES"</pre> +</div> +</section> +<section class="Sh"> +<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1> +<p class="Pp">The <code class="Nm">rl</code> driver provides support for PCI + Ethernet adapters and embedded controllers based on the Realtek 8129 and + 8139 Fast Ethernet controller chips.</p> +<p class="Pp">The Realtek 8129/8139 series controllers use bus master DMA but do + not use a descriptor-based data transfer mechanism. The receiver uses a + single fixed size ring buffer from which packets must be copied into mbufs. + For transmission, there are only four outbound packet address registers + which require all outgoing packets to be stored as contiguous buffers. + Furthermore, outbound packet buffers must be longword aligned or else + transmission will fail.</p> +<p class="Pp">The 8129 differs from the 8139 in that the 8139 has an internal + PHY which is controlled through special direct access registers whereas the + 8129 uses an external PHY via an MII bus. The 8139 supports both 10 and + 100Mbps speeds in either full or half duplex. The 8129 can support the same + speeds and modes given an appropriate PHY chip.</p> +<p class="Pp">Note: support for the 8139C+ chip is provided by the + <a class="Xr">re(4)</a> driver.</p> +<p class="Pp">The <code class="Nm">rl</code> driver supports the following media + types:</p> +<dl class="Bl-tag"> + <dt>autoselect</dt> + <dd>Enable autoselection of the media type and options. This is only supported + if the PHY chip attached to the Realtek controller supports NWAY + autonegotiation. The user can manually override the autoselected mode by + adding media options to the <span class="Pa">/etc/rc.conf</span> + file.</dd> + <dt>10baseT/UTP</dt> + <dd>Set 10Mbps operation. The <var class="Ar">mediaopt</var> option can also + be used to select either <var class="Ar">full-duplex</var> or + <var class="Ar">half-duplex</var> modes.</dd> + <dt>100baseTX</dt> + <dd>Set 100Mbps (Fast Ethernet) operation. The <var class="Ar">mediaopt</var> + option can also be used to select either <var class="Ar">full-duplex</var> + or <var class="Ar">half-duplex</var> modes.</dd> +</dl> +<p class="Pp">The <code class="Nm">rl</code> driver supports the following media + options:</p> +<dl class="Bl-tag"> + <dt>full-duplex</dt> + <dd>Force full duplex operation.</dd> + <dt>half-duplex</dt> + <dd>Force half duplex operation.</dd> +</dl> +<p class="Pp">Note that the 100baseTX media type is only available if supported + by the adapter. For more information on configuring this device, see + <a class="Xr">ifconfig(8)</a>.</p> +</section> +<section class="Sh"> +<h1 class="Sh" id="HARDWARE"><a class="permalink" href="#HARDWARE">HARDWARE</a></h1> +<p class="Pp">Adapters supported by the <code class="Nm">rl</code> driver + include:</p> +<p class="Pp"></p> +<ul class="Bl-bullet Bl-compact"> + <li>Accton “Cheetah” EN1207D (MPX 5030/5038; Realtek 8139 + clone)</li> + <li>Allied Telesyn AT2550</li> + <li>Allied Telesyn AT2500TX</li> + <li>Belkin F5D5000</li> + <li>BUFFALO (Melco INC.) LPC-CB-CLX (CardBus)</li> + <li>Compaq HNE-300</li> + <li>CompUSA no-name 10/100 PCI Ethernet NIC</li> + <li>Corega FEther CB-TXD</li> + <li>Corega FEtherII CB-TXD</li> + <li>D-Link DFE-520TX (rev. C1)</li> + <li>D-Link DFE-528TX</li> + <li>D-Link DFE-530TX+</li> + <li>D-Link DFE-538TX</li> + <li>D-Link DFE-690TXD</li> + <li>Edimax EP-4103DL CardBus</li> + <li>Encore ENL832-TX 10/100 M PCI</li> + <li>Farallon NetLINE 10/100 PCI</li> + <li>Genius GF100TXR</li> + <li>GigaFast Ethernet EE100-AXP</li> + <li>KTX-9130TX 10/100 Fast Ethernet</li> + <li>LevelOne FPC-0106TX</li> + <li>Longshine LCS-8038TX-R</li> + <li>NDC Communications NE100TX-E</li> + <li>Netronix Inc. EA-1210 NetEther 10/100</li> + <li>Nortel Networks 10/100BaseTX</li> + <li>OvisLink LEF-8129TX</li> + <li>OvisLink LEF-8139TX</li> + <li>Peppercon AG ROL-F</li> + <li>Planex FNW-3603-TX</li> + <li>Planex FNW-3800-TX</li> + <li>SMC EZ Card 10/100 PCI 1211-TX</li> + <li>SOHO (PRAGMATIC) UE-1211C</li> +</ul> +</section> +<section class="Sh"> +<h1 class="Sh" id="LOADER_TUNABLES"><a class="permalink" href="#LOADER_TUNABLES">LOADER + TUNABLES</a></h1> +<dl class="Bl-tag"> + <dt id="dev.rl._unit.prefer_iomap"><var class="Va">dev.rl.%unit.prefer_iomap</var></dt> + <dd>This tunable controls which register mapping should be used on the + specified device. A non-zero value enables I/O space register mapping. For + controllers that have no I/O space register mapping this tunable should be + set to 0 to use memory space register mapping. The default value is 1 to + use I/O space register mapping.</dd> + <dt id="dev.rl._unit.twister_enable"><var class="Va">dev.rl.%unit.twister_enable</var></dt> + <dd>Non-zero value enables the long cable tuning on the specified device. + Disabled by default.</dd> +</dl> +</section> +<section class="Sh"> +<h1 class="Sh" id="DIAGNOSTICS"><a class="permalink" href="#DIAGNOSTICS">DIAGNOSTICS</a></h1> +<dl class="Bl-diag"> + <dt>rl%d: couldn't map memory</dt> + <dd>A fatal initialization error has occurred.</dd> + <dt>rl%d: couldn't map interrupt</dt> + <dd>A fatal initialization error has occurred.</dd> + <dt>rl%d: watchdog timeout</dt> + <dd>The device has stopped responding to the network, or there is a problem + with the network connection (cable).</dd> + <dt>rl%d: no memory for rx list</dt> + <dd>The driver failed to allocate an mbuf for the receiver ring.</dd> + <dt>rl%d: no memory for tx list</dt> + <dd>The driver failed to allocate an mbuf for the transmitter ring when + allocating a pad buffer or collapsing an mbuf chain into a cluster.</dd> + <dt>rl%d: chip is in D3 power state -- setting to D0</dt> + <dd>This message applies only to adapters which support power management. Some + operating systems place the controller in low power mode when shutting + down, and some PCI BIOSes fail to bring the chip out of this state before + configuring it. The controller loses all of its PCI configuration in the + D3 state, so if the BIOS does not set it back to full power mode in time, + it will not be able to configure it correctly. The driver tries to detect + this condition and bring the adapter back to the D0 (full power) state, + but this may not be enough to return the driver to a fully operational + condition. If you see this message at boot time and the driver fails to + attach the device as a network interface, you will have to perform second + warm boot to have the device properly configured. + <p class="Pp">Note that this condition only occurs when warm booting from + another operating system. If you power down your system prior to booting + <span class="Ux">FreeBSD</span>, the card should be configured + correctly.</p> + </dd> +</dl> +</section> +<section class="Sh"> +<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE + ALSO</a></h1> +<p class="Pp"><a class="Xr">altq(4)</a>, <a class="Xr">arp(4)</a>, + <a class="Xr">miibus(4)</a>, <a class="Xr">netintro(4)</a>, + <a class="Xr">ng_ether(4)</a>, <a class="Xr">polling(4)</a>, + <a class="Xr">ifconfig(8)</a></p> +<p class="Pp"><cite class="Rs"><i class="RsB">The Realtek 8129, 8139 and 8139C+ + datasheets</i>, + <a class="RsU" href="https://www.realtek.com">https://www.realtek.com</a>.</cite></p> +</section> +<section class="Sh"> +<h1 class="Sh" id="HISTORY"><a class="permalink" href="#HISTORY">HISTORY</a></h1> +<p class="Pp">The <code class="Nm">rl</code> device driver first appeared in + <span class="Ux">FreeBSD 3.0</span>.</p> +</section> +<section class="Sh"> +<h1 class="Sh" id="AUTHORS"><a class="permalink" href="#AUTHORS">AUTHORS</a></h1> +<p class="Pp">The <code class="Nm">rl</code> driver was written by + <span class="An">Bill Paul</span> + <<a class="Mt" href="mailto:wpaul@ctr.columbia.edu">wpaul@ctr.columbia.edu</a>>.</p> +</section> +<section class="Sh"> +<h1 class="Sh" id="BUGS"><a class="permalink" href="#BUGS">BUGS</a></h1> +<p class="Pp">Since outbound packets must be longword aligned, the transmit + routine has to copy an unaligned packet into an mbuf cluster buffer before + transmission. The driver abuses the fact that the cluster buffer pool is + allocated at system startup time in a contiguous region starting at a page + boundary. Since cluster buffers are 2048 bytes, they are longword aligned by + definition. The driver probably should not be depending on this + characteristic.</p> +<p class="Pp">The Realtek data sheets are of especially poor quality, and there + is a lot of information missing particularly concerning the receiver + operation. One particularly important fact that the data sheets fail to + mention relates to the way in which the chip fills in the receive buffer. + When an interrupt is posted to signal that a frame has been received, it is + possible that another frame might be in the process of being copied into the + receive buffer while the driver is busy handling the first one. If the + driver manages to finish processing the first frame before the chip is done + DMAing the rest of the next frame, the driver may attempt to process the + next frame in the buffer before the chip has had a chance to finish DMAing + all of it.</p> +<p class="Pp">The driver can check for an incomplete frame by inspecting the + frame length in the header preceding the actual packet data: an incomplete + frame will have the magic length of 0xFFF0. When the driver encounters this + value, it knows that it has finished processing all currently available + packets. Neither this magic value nor its significance are documented + anywhere in the Realtek data sheets.</p> +</section> +</div> +<table class="foot"> + <tr> + <td class="foot-date">January 16, 2013</td> + <td class="foot-os">FreeBSD 15.0</td> + </tr> +</table> |