diff options
Diffstat (limited to 'static/freebsd/man4/est.4 3.html')
| -rw-r--r-- | static/freebsd/man4/est.4 3.html | 116 |
1 files changed, 116 insertions, 0 deletions
diff --git a/static/freebsd/man4/est.4 3.html b/static/freebsd/man4/est.4 3.html new file mode 100644 index 00000000..3404b1c1 --- /dev/null +++ b/static/freebsd/man4/est.4 3.html @@ -0,0 +1,116 @@ +<table class="head"> + <tr> + <td class="head-ltitle">EST(4)</td> + <td class="head-vol">Device Drivers Manual</td> + <td class="head-rtitle">EST(4)</td> + </tr> +</table> +<div class="manual-text"> +<section class="Sh"> +<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1> +<p class="Pp"><code class="Nm">est</code> — <span class="Nd">Enhanced + Speedstep Technology</span></p> +</section> +<section class="Sh"> +<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1> +<p class="Pp">To compile this capability into your kernel place the following + line in your kernel configuration file:</p> +<div class="Bd Pp Bd-indent"><code class="Cd">device cpufreq</code></div> +</section> +<section class="Sh"> +<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1> +<p class="Pp">The <code class="Nm">est</code> interface provides support for the + Intel Enhanced Speedstep Technology.</p> +<p class="Pp">Note that <code class="Nm">est</code> capabilities are + automatically loaded by the <a class="Xr">cpufreq(4)</a> driver.</p> +</section> +<section class="Sh"> +<h1 class="Sh" id="LOADER_TUNABLES"><a class="permalink" href="#LOADER_TUNABLES">LOADER + TUNABLES</a></h1> +<p class="Pp">The <code class="Nm">est</code> interface is intended to allow + <a class="Xr">cpufreq(4)</a> to access and implement Intel Enhanced + SpeedStep Technology via <a class="Xr">acpi(4)</a> and the acpi_perf + interface accessors. If the default settings are not optimal, the following + sysctls can be used to modify or monitor <code class="Nm">est</code> + behavior.</p> +<dl class="Bl-tag"> + <dt>hw.est.msr_info</dt> + <dd>Attempt to infer information from direct probing of the msr. Should only + be used in diagnostic cases. (default 0)</dd> + <dt>hw.est.strict</dt> + <dd>Validate frequency requested is accepted by the CPU when set. It appears + that this will only work on single core cpus. (default 0)</dd> +</dl> +</section> +<section class="Sh"> +<h1 class="Sh" id="SYSCTL_VARIABLES"><a class="permalink" href="#SYSCTL_VARIABLES">SYSCTL + VARIABLES</a></h1> +<p class="Pp">The following <a class="Xr">sysctl(8)</a> values are available</p> +<dl class="Bl-tag"> + <dt id="dev.est._d._desc"><var class="Va">dev.est.%d.%desc</var></dt> + <dd>Description of support, almost always Enhanced SpeedStep Frequency + Control.</dd> + <dt>dev.est.0.%desc: Enhanced SpeedStep Frequency Control</dt> + <dd style="width: auto;"> </dd> + <dt id="dev.est._d._driver"><var class="Va">dev.est.%d.%driver</var></dt> + <dd>Driver in use, always est.</dd> + <dt>dev.est.0.%driver: est</dt> + <dd style="width: auto;"> </dd> + <dt id="dev.est._d._parent"><var class="Va">dev.est.%d.%parent</var></dt> + <dd>The CPU that is exposing these frequencies. For example + <var class="Va">cpu0</var>.</dd> + <dt>dev.est.0.%parent: cpu0</dt> + <dd style="width: auto;"> </dd> + <dt id="dev.est._d.freq_settings"><var class="Va">dev.est.%d.freq_settings</var>.</dt> + <dd>The valid frequencies that are allowed by this CPU and their step + values.</dd> + <dt>dev.est.0.freq_settings: 2201/45000 2200/45000 2000/39581 1900/37387</dt> + <dd>1800/34806 1700/32703 1600/30227 1500/28212 1400/25828 1300/23900 + 1200/21613 1100/19775 1000/17582 900/15437 800/13723</dd> +</dl> +</section> +<section class="Sh"> +<h1 class="Sh" id="DIAGNOSTICS"><a class="permalink" href="#DIAGNOSTICS">DIAGNOSTICS</a></h1> +<dl class="Bl-diag"> + <dt>est%d: <Enhanced SpeedStep Frequency Control> on cpu%d</dt> + <dd> + <p class="Pp">Indicates normal startup of this interface.</p> + </dd> + <dt>est: CPU supports Enhanced Speedstep, but is not recognized.</dt> + <dd></dd> + <dt>est: cpu_vendor GenuineIntel, msr 471c471c0600471c</dt> + <dd></dd> + <dt>device_attach: est%d attach returned 6</dt> + <dd> + <p class="Pp">Indicates all attempts to attach to this interface have + failed. This usually indicates an improper BIOS setting restricting O/S + control of the CPU speeds. Consult your BIOS documentation for more + details.</p> + </dd> +</dl> +</section> +<section class="Sh"> +<h1 class="Sh" id="COMPATIBILITY"><a class="permalink" href="#COMPATIBILITY">COMPATIBILITY</a></h1> +<p class="Pp"><code class="Nm">est</code> is only found on supported Intel + CPUs.</p> +</section> +<section class="Sh"> +<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE + ALSO</a></h1> +<p class="Pp"><a class="Xr">cpufreq(4)</a></p> +<p class="Pp"><cite class="Rs"><span class="RsT">Intel 64 and IA-32 + Architectures Software Developer Manuals</span>, + <a class="RsU" href="http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html">http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html</a>.</cite></p> +</section> +<section class="Sh"> +<h1 class="Sh" id="AUTHORS"><a class="permalink" href="#AUTHORS">AUTHORS</a></h1> +<p class="Pp">This manual page was written by <span class="An">Sean Bruno</span> + <<a class="Mt" href="mailto:sbruno@FreeBSD.org">sbruno@FreeBSD.org</a>>.</p> +</section> +</div> +<table class="foot"> + <tr> + <td class="foot-date">April 21, 2020</td> + <td class="foot-os">FreeBSD 15.0</td> + </tr> +</table> |