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+<table class="head">
+  <tr>
+    <td class="head-ltitle">TI(4)</td>
+    <td class="head-vol">Device Drivers Manual</td>
+    <td class="head-rtitle">TI(4)</td>
+  </tr>
+</table>
+<div class="manual-text">
+<section class="Sh">
+<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1>
+<p class="Pp"><code class="Nm">ti</code> &#x2014; <span class="Nd">Alteon
+    Networks Tigon I and Tigon II Gigabit Ethernet driver</span></p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1>
+<p class="Pp"><code class="Cd">ti* at pci? dev ? function ?</code></p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1>
+<p class="Pp">The <code class="Nm">ti</code> driver provides support for PCI
+    Gigabit Ethernet adapters based on the Alteon Networks Tigon Gigabit
+    Ethernet controller chip. The Tigon contains an embedded R4000 CPU, Gigabit
+    MAC, dual DMA channels and a PCI interface unit. The Tigon II contains two
+    R4000 CPUs and other refinements. Either chip can be used in either a 32-bit
+    or 64-bit PCI slot. Communication with the chip is achieved via PCI shared
+    memory and bus master DMA. The Tigon I and II support hardware multicast
+    address filtering, VLAN tag extraction and insertion, and jumbo Ethernet
+    frames sizes up to 9000 bytes. Note that the Tigon I chipset is no longer in
+    active production: all new adapters should come equipped with Tigon II
+    chipsets.</p>
+<p class="Pp">There are several PCI boards available from both Alteon and other
+    vendors that use the Tigon chipset under OEM contract. The
+    <code class="Nm">ti</code> driver has been tested with the following
+    Tigon-based adapters:</p>
+<ul class="Bl-bullet Bd-indent">
+  <li>The Alteon AceNIC V Gigabit (1000BASE-SX and 1000BASE-T variants) Ethernet
+      adapter</li>
+  <li>The 3Com 3c985-SX Gigabit Ethernet adapter</li>
+  <li>The Netgear GA620 Gigabit (1000BASE-SX and 1000BASE-T variants) Ethernet
+      adapter</li>
+  <li>The Digital EtherWORKS 1000SX PCI Gigabit Adapter (DEGPA)</li>
+</ul>
+<p class="Pp">The following should also be supported but have not yet been
+    tested:</p>
+<ul class="Bl-bullet Bd-indent">
+  <li>Silicon Graphics PCI Gigabit Ethernet adapter</li>
+</ul>
+<p class="Pp">While the Tigon chipset supports 10, 100 and 1000Mbps speeds,
+    support for 10 and 100Mbps speeds is only available on boards with the
+    proper transceivers. Most adapters are only designed to work at 1000Mbps,
+    however the driver should support those NICs that work at lower speeds as
+    well.</p>
+<p class="Pp">Support for jumbo frames is provided via the interface MTU
+    setting. Selecting an MTU larger than 1500 bytes with the
+    <a class="Xr">ifconfig(8)</a> utility configures the adapter to receive and
+    transmit jumbo frames. Using jumbo frames can greatly improve performance
+    for certain tasks, such as file transfers and data streaming.</p>
+<p class="Pp">The <code class="Nm">ti</code> driver supports the following media
+    types:</p>
+<dl class="Bl-tag">
+  <dt>autoselect</dt>
+  <dd>Enable autoselection of the media type and options.</dd>
+  <dt>10baseT/UTP</dt>
+  <dd>Set 10Mbps operation. The <var class="Ar">mediaopt</var> option can also
+      be used to select either <var class="Ar">full-duplex</var> or
+      <var class="Ar">half-duplex modes</var>.</dd>
+  <dt>100baseTX</dt>
+  <dd>Set 100Mbps (fast Ethernet) operation. The <var class="Ar">mediaopt</var>
+      option can also be used to select either <var class="Ar">full-duplex</var>
+      or <var class="Ar">half-duplex</var> modes.</dd>
+  <dt>1000baseSX</dt>
+  <dd>Set 1000Mbps (Gigabit Ethernet over multimode fiber) operation. Only full
+      <var class="Ar">full-duplex</var> mode is supported at this speed.</dd>
+  <dt>1000baseT</dt>
+  <dd>Set 1000Mbps (Gigabit Ethernet over twisted pair) operation. Only full
+      <var class="Ar">full-duplex</var> mode is supported at this speed.</dd>
+</dl>
+<p class="Pp">The <code class="Nm">ti</code> driver supports the following media
+    options:</p>
+<dl class="Bl-tag">
+  <dt>full-duplex</dt>
+  <dd>Force full duplex operation.</dd>
+  <dt>half-duplex</dt>
+  <dd>Force half duplex operation.</dd>
+</dl>
+<p class="Pp">The Alteon Tigon and Tigon II support IPv4/TCP/UDP checksumming in
+    hardware. The <code class="Nm">ti</code> supports this feature of the chip's
+    firmware. See <a class="Xr">ifconfig(8)</a> for information on how to enable
+    this feature.</p>
+<p class="Pp">For more information on configuring this device, see
+    <a class="Xr">ifconfig(8)</a>.</p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="DIAGNOSTICS"><a class="permalink" href="#DIAGNOSTICS">DIAGNOSTICS</a></h1>
+<dl class="Bl-diag">
+  <dt>ti%d: can't map memory space</dt>
+  <dd>A fatal initialization error has occurred.</dd>
+  <dt>ti%d: couldn't map / establish interrupt</dt>
+  <dd>A fatal initialization error has occurred.</dd>
+  <dt>ti%d: jumbo buffer allocation failed</dt>
+  <dd>The driver failed to allocate memory for jumbo frames during
+      initialization.</dd>
+  <dt>ti%d: bios thinks we're in a 64 bit slot, but we aren't</dt>
+  <dd>The BIOS has programmed the NIC as though it had been installed in a
+      64-bit PCI slot, but in fact the NIC is in a 32-bit slot. This happens as
+      a result of a bug in some BIOSes. This can be worked around on the Tigon
+      II, but on the Tigon I initialization will fail.</dd>
+  <dt>ti%d: board self-diagnostics failed!</dt>
+  <dd>The ROMFAIL bit in the CPU state register was set after system startup,
+      indicating that the on-board NIC diagnostics failed.</dd>
+  <dt>ti%d: unknown hwrev</dt>
+  <dd>The driver detected a board with an unsupported hardware revision. The
+      <code class="Nm">ti</code> driver supports revision 4 (Tigon 1) and
+      revision 6 (Tigon 2) chips and has firmware only for those devices.</dd>
+  <dt>ti%d: watchdog timeout</dt>
+  <dd>The device has stopped responding to the network, or there is a problem
+      with the network connection (cable).</dd>
+</dl>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE
+  ALSO</a></h1>
+<p class="Pp"><a class="Xr">netintro(4)</a>, <a class="Xr">pci(4)</a>,
+    <a class="Xr">ifconfig(8)</a></p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="HISTORY"><a class="permalink" href="#HISTORY">HISTORY</a></h1>
+<p class="Pp">The <code class="Nm">ti</code> device driver first appeared in
+    <span class="Ux">NetBSD 1.4.2</span>.</p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="AUTHORS"><a class="permalink" href="#AUTHORS">AUTHORS</a></h1>
+<p class="Pp">The <code class="Nm">ti</code> driver was written by
+    <span class="An">Bill Paul</span>
+    &lt;<a class="Mt" href="mailto:wpaul@ctr.columbia.edu">wpaul@ctr.columbia.edu</a>&gt;.</p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="BUGS"><a class="permalink" href="#BUGS">BUGS</a></h1>
+<p class="Pp">The driver currently tries to access some on-board memory
+    transparently. This mapping (BUS_SPACE_MAP_LINEAR) fails on systems where
+    the corresponding PCI memory range is located in &quot;sparse&quot; space
+    only.</p>
+<p class="Pp">This driver currently does not work on big-endian systems.</p>
+</section>
+</div>
+<table class="foot">
+  <tr>
+    <td class="foot-date">June 2, 2001</td>
+    <td class="foot-os">NetBSD 10.1</td>
+  </tr>
+</table>