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+<table class="head">
+  <tr>
+    <td class="head-ltitle">NCT(4)</td>
+    <td class="head-vol">Device Drivers Manual</td>
+    <td class="head-rtitle">NCT(4)</td>
+  </tr>
+</table>
+<div class="manual-text">
+<section class="Sh">
+<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1>
+<p class="Pp"><code class="Nm">nct</code> &#x2014; <span class="Nd">Nuvoton
+    NCT5104D SuperIO driver</span></p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1>
+<p class="Pp"><code class="Cd">nct0 at isa? port ?</code>
+  <br/>
+  <code class="Cd">nct0 at isa? port 0x2e</code>
+  <br/>
+  <code class="Cd">nct0 at isa? port 0x4e</code>
+  <br/>
+  <code class="Cd">gpio* at nct?</code></p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1>
+<p class="Pp">The <code class="Nm">nct</code> driver supports the GPIO functions
+    of the NCT5104D. The driver does not support the watchdog function of the
+    chip. The chip's UARTs are driven by the <a class="Xr">com(4)</a>
+  driver.</p>
+<p class="Pp">The probe routine for this device is invasive. The chip will be
+    probed for only if the device is configured into the kernel with a fixed
+    port number (0x2e or 0x4e), or if running on a system that is known to have
+    a NCT5104D, such as the PC Engines APU line of systems.</p>
+<p class="Pp">GPIO pins on this chip are shared with the 3rd UART, 4th UART, a
+    clock input line, and the watchdog timer. If any these functions have been
+    enabled by the BIOS, the <code class="Nm">nct</code> driver will not take
+    control of the corresponding GPIO lines. At attach time, the driver logs
+    which of the 17 GPIO lines are enabled.</p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE
+  ALSO</a></h1>
+<p class="Pp"><a class="Xr">gpio(4)</a>, <a class="Xr">isa(4)</a>,
+    <a class="Xr">gpioctl(8)</a></p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="HISTORY"><a class="permalink" href="#HISTORY">HISTORY</a></h1>
+<p class="Pp">The <code class="Nm">nct</code> driver first appeared in
+    <span class="Ux">NetBSD 10</span>.</p>
+</section>
+<section class="Sh">
+<h1 class="Sh" id="CAVEATS"><a class="permalink" href="#CAVEATS">CAVEATS</a></h1>
+<p class="Pp">If the chip has not been configured in a complete and accurate
+    manner by the BIOS, GPIO lines may be needlessly disabled.</p>
+</section>
+</div>
+<table class="foot">
+  <tr>
+    <td class="foot-date">December 21, 2020</td>
+    <td class="foot-os">NetBSD 10.1</td>
+  </tr>
+</table>