summaryrefslogtreecommitdiff
path: root/src/asm.hpp
diff options
context:
space:
mode:
authorJacob McDonnell <jacob@jacobmcdonnell.com>2026-03-15 21:51:55 -0400
committerJacob McDonnell <jacob@jacobmcdonnell.com>2026-03-15 21:51:55 -0400
commit2999bd3b9466617938f2f7ceb689cfbe33b46cd9 (patch)
tree538c285c82ca0980a3192dbac08009da5128d742 /src/asm.hpp
parent7025f30be3b6cccf9f419daec9f0b7aeeaa2d6d3 (diff)
feat: Initial mapping of registers and instructions
Mapping of registers from register names to numbers. As well, the inital mapping of instructions to their opcodes has been added. There are bit fields for each type of instruction, and a tagged union of all the instruction types.
Diffstat (limited to 'src/asm.hpp')
-rw-r--r--src/asm.hpp74
1 files changed, 74 insertions, 0 deletions
diff --git a/src/asm.hpp b/src/asm.hpp
new file mode 100644
index 0000000..4d5eb73
--- /dev/null
+++ b/src/asm.hpp
@@ -0,0 +1,74 @@
+#ifndef SRC_ASM_HPP_
+#define SRC_ASM_HPP_
+
+#include <cstdint>
+
+enum class type_t {R, I, S, U, B, J};
+
+struct r_type {
+ uint32_t funct7 : 7;
+ uint32_t rs2 : 5;
+ uint32_t rs1 : 5;
+ uint32_t funct3 : 3;
+ uint32_t rd : 5;
+ uint32_t opcode : 7;
+};
+
+struct i_type {
+ uint32_t imm : 12;
+ uint32_t rs1 : 5;
+ uint32_t funct3 : 3;
+ uint32_t rd : 5;
+ uint32_t opcode : 7;
+};
+
+struct s_type {
+ uint32_t imm_hi : 7;
+ uint32_t rs2 : 5;
+ uint32_t rs1 : 5;
+ uint32_t funct3 : 3;
+ uint32_t imm_lo : 5;
+ uint32_t opcode : 7;
+};
+
+struct u_type {
+ uint32_t imm : 10;
+ uint32_t rd : 5;
+ uint32_t opcode : 7;
+};
+
+struct b_type {
+ uint32_t a : 1;
+ uint32_t imm_hi : 6;
+ uint32_t rs2 : 5;
+ uint32_t rs1 : 5;
+ uint32_t funct3 : 3;
+ uint32_t imm_lo : 4;
+ uint32_t b : 1;
+ uint32_t opcode : 7;
+};
+
+struct j_type {
+ uint32_t a : 1;
+ uint32_t imm_lo : 10;
+ uint32_t b : 1;
+ uint32_t imm_hi : 8;
+ uint32_t rd : 5;
+ uint32_t opcode : 7;
+};
+
+struct instruction_t {
+ type_t t;
+ union {
+ r_type r;
+ i_type i;
+ s_type s;
+ u_type u;
+ b_type b;
+ j_type j;
+ uint32_t value;
+ };
+};
+
+#endif // SRC_ASM_HPP_
+