diff options
| author | Jacob McDonnell <jacob@jacobmcdonnell.com> | 2025-02-03 13:59:20 -0500 |
|---|---|---|
| committer | Jacob McDonnell <jacob@jacobmcdonnell.com> | 2025-02-03 13:59:20 -0500 |
| commit | 8e27239f2ca018dd72a8a459c6eceea163a00249 (patch) | |
| tree | 1b759a1debe1918898d93a3d17a9eeaa1cad321d | |
| parent | 8ece714428ee0e74a0427aa772273f904a75b868 (diff) | |
HW3 Initial
32 files changed, 898 insertions, 47 deletions
diff --git a/cmpen472hw2McDonnell/ASM_layout.hwl b/cmpen472hw2McDonnell/ASM_layout.hwl index 861b255..0e6a666 100644 --- a/cmpen472hw2McDonnell/ASM_layout.hwl +++ b/cmpen472hw2McDonnell/ASM_layout.hwl @@ -1,7 +1,7 @@ OPEN source 0 0 60 42
Source < attributes TOOLTIP on,TOOLTIP_FORMAT signed,TOOLTIP_MODE details,FREEZE off,MARKS off
OPEN assembly 60 0 40 30
-Assembly < attributes ADR on,CODE off,ABSADR on,SYMB off,FORMAT Auto,FREEZE off,TOPPC 0x3138
+Assembly < attributes ADR on,CODE off,ABSADR on,SYMB off,FORMAT Auto,FREEZE off,TOPPC 0xCBCB
OPEN procedure 60 60 40 17
Procedure < attributes VALUES on,TYPES off
OPEN register 60 30 40 30
diff --git a/cmpen472hw2McDonnell/Full_Chip_Simulation.ini b/cmpen472hw2McDonnell/Full_Chip_Simulation.ini index b0a1f6f..e9f86a0 100644 --- a/cmpen472hw2McDonnell/Full_Chip_Simulation.ini +++ b/cmpen472hw2McDonnell/Full_Chip_Simulation.ini @@ -10,7 +10,7 @@ Target=sim Layout=ASM_layout.hwl
LoadDialogOptions=AUTOERASEANDFLASH NORUNAFTERLOAD
CPU=HC12
-MainFrame=0,1,-1,-1,-1,-1,793,208,2008,1231
+MainFrame=0,1,-1,-1,-1,-1,514,197,1729,1220
Configuration=Full_Chip_Simulation.hwc
Statusbar=1
ShowToolbar=1
@@ -40,3 +40,10 @@ FCS=MC9S12C32 ZEROTIMEATRESET=1
OSCFREQUENCY=48000000
DISPLAYTIME=0
+
+
+[Recent Layout File List]
+File0=ASM_layout.hwl
+File1=
+File2=
+File3=
diff --git a/cmpen472hw2McDonnell/Sources/cmpen472hw2_McDonnell.asm b/cmpen472hw2McDonnell/Sources/cmpen472hw2_McDonnell.asm new file mode 100644 index 0000000..3652de5 --- /dev/null +++ b/cmpen472hw2McDonnell/Sources/cmpen472hw2_McDonnell.asm @@ -0,0 +1,202 @@ +**************************************************************************
+*
+* Title: LED Light Blinking
+*
+* Objective: CMPEN 472 Homework 2 in-class-room demonstration
+* program
+*
+* Revision: V1.0
+*
+* Date: Jan. 29, 2025
+*
+* Programmer: Jacob McDonnell
+*
+* Company: The Pennsylvania State University
+* Department of Computer Science and Engineering
+*
+* Algorithm: Simple Parallel I/O use and time delay-loop demo
+*
+* Register Use: A: LED Light on/off state and Switch 1 on/off state
+* X,Y: Delay and loop counters
+*
+* Memory Use: RAM Locations from $3000 for data,
+* RAM Locations from $3100 for program
+*
+* Input: Parameters hard-coded in the program - PORTB
+* Switch 1 at PORTB bit 0
+* Switch 2 at PORTB bit 1
+* Switch 3 at PORTB bit 2
+* Switch 4 at PORTB bit 3
+*
+* Output: LED 1 at PORTB bit 4
+* LED 2 at PORTB bit 5
+* LED 3 at PORTB bit 6
+* LED 4 at PORTB bit 7
+*
+* Observation: This program that blinks LEDs and blinking period can
+* be changed with the delay loop counter value. When switch 1
+* is not pressed, LEDs 1 and 4 will blink alternately for 1
+* second each. When switch 1 is pressed LEDs 1, 2, 3, & 4 will
+* all turn on at the same time for 1 second and turn off at the
+* same time for 1 second.
+*
+* Note: All Homework programs MUST have comments similar
+* to this Homework 2 program. So, please use those
+* comment format for all your subsequent CMPEN472
+* Homework programs.
+*
+* Adding more explanations and comments help you and
+* others to understnad your program later.
+*
+* Comments: This program is developed and simulated using CodeWarrior
+* development software and targeted for Axion
+* Manufacturing's CSM-12C128 board running at 24MHz.
+*
+**************************************************************************
+* Parameter Declearation Section
+*
+* Export Symbols
+ xdef pgstart ; export 'pgstart' symbol
+ absentry pgstart ; for assembly entry point
+
+* Symbols and Macros
+PORTA equ $0000 ; i/o port A addresses
+DDRA equ $0002 ; data direction register for PORTA
+PORTB equ $0001 ; i/o port B addresses
+DDRB equ $0003 ; data direction register for PORTB
+
+**************************************************************************
+* Data Section: address used [ $3000 to $30FF ] RAM Memory
+*
+ org $3000 ; Reserved RAM memory starting address
+ ; for Data for CMPEN 472 class
+Counter1 dc.w $0100 ; X register count number for time Delay
+ ; inner loop for msec
+Counter2 dc.w $00BF ; Y register count number for time delay
+ ; output loop for sec
+*
+**************************************************************************
+* Program Section: address used [ $3100 to $3FFF ] RAM Memory
+*
+ org $3100 ; Program start address, in RAM
+pgstart lds #$3100 ; initialize the stack pointer
+
+ ldaa #%11111111 ; LED 1, 2, 3, 4 at PORTB bit 4, 5, 6, 7 FOR CSM-12C128 board
+ staa DDRB ; set PORTB bit 4, 5, 6, 7 as Output
+
+ ldaa #%00000000
+ staa PORTB ; Turn off LED 1, 2, 3, 4 (all bits in PORTB, for simulation
+
+mainLoop
+ ldaa PORTB
+ anda #%00000001 ; Read switch 1 at PORTB bit 0
+ bne sw1pushed ; check to see if it is pushed
+
+sw1notpsh jsr alternate ; Jump to the alternate subroutine to alternate LED 1 and 4
+ bra mainLoop ; loop back to the beginning to check the switch
+
+sw1pushed jsr allBlink ; Jump to the allBlink subroutine to blink all lights
+ bra mainLoop ; loop back to the beginning to check the switch
+
+**************************************************************************
+* Subroutine Section: address used [ $3100 to $3FFF ] RAM Memory
+*
+
+;*************************************************************************
+; delay1sec subroutine
+;
+; This subroutine will delay for 1 second
+;
+; Input: a 16 bit count number in 'Counter2'
+; Output: time delay of 1 second, cpu cycles wasted
+; Registers in use: Y register as counter
+; Memory locations in use: a 16bit input number at 'Counter2'
+;
+; Comments: This subroutine requires delayMS subroutine
+;
+
+delay1sec
+ pshy ; save Y to the stack
+ ldy Counter2 ; long delay by the value of Counter2
+
+dly1Loop jsr delayMS ; total time delay = Y * delayMS
+ dey
+ bne dly1Loop
+
+ puly ; restore y from the stack
+ rts ; return
+
+;*************************************************************************
+; delayMS subroutine
+;
+; This subroutine causes a few msec. Delay
+;
+; Input: a 16bit count number in 'Counter1'
+; Output: time delay, cpu cycle wasted
+; Registers in use: X register, as counter
+; Memory locations in use: a 16bit input number at 'Counter1'
+;
+; Comments: one can add more NOP instructions to lengthen the delay time.
+;
+
+delayMS
+ pshx ; save X to the stack
+ ldx Counter1 ; short Delay
+
+dlyMSLoop nop ; total time delay = X * NOP
+ dex
+ bne dlyMSLoop
+
+ pulx ; restore X
+ rts ; return
+
+;*************************************************************************
+; alternate subroutine
+;
+; This subroutine will alternately blink LEDs 1 anf 4 for 1 second each.
+;
+; Input: No input all values are hardcoded
+; Output: LEDs 1 and 4 blinking alternately
+; Registers in use: No registers are used
+; Memory locations in use: A one byte memory location associated with PORTB ($0001)
+;
+; Comments: This subroutine requires delay1sec subroutine.
+;
+
+alternate
+ bset PORTB,%10000000 ; Turn ON LED 4 at PORTB bit 7
+ bclr PORTB,%00010000 ; Turn off LED 1 at PORTB bit 4
+ jsr delay1sec ; Wait for 1 second
+
+ bclr PORTB,%10000000 ; Turn off LED 4 at PORTB bit 7
+ bset PORTB,%00010000 ; Turn on LED 1 at PORTB bit 4
+ jsr delay1sec ; Wait for 1 second
+ rts ; Return to the caller
+
+;*************************************************************************
+; allBlink subroutine
+;
+; This subroutine will blink LEDs 1, 2, 3, & 4 on for 1 second and off for
+; 1 second all at the same time.
+;
+; Input: No input all values are hardcoded
+; Output: LEDs 1, 2, 3, & 4 blinking on and off at the
+; same time for 1 second
+; Registers in use: No registers are used
+; Memory locations in use: A one byte memory location associated with PORTB ($0001)
+;
+; Comments: This subroutine requires delay1sec subroutine.
+;
+
+allBlink
+ bset PORTB,%11110000 ; Turn ON all 4 LEDs
+ jsr delay1sec ; Wait for 1 second
+
+ bclr PORTB,%11110000 ; Turn off all 4 LEDs
+ jsr delay1sec ; Wait for 1 second
+ rts ; Return to the caller
+
+*
+* Add any subroutines here
+*
+ end ; last line of the file
\ No newline at end of file diff --git a/cmpen472hw2McDonnell/Sources/main.asm b/cmpen472hw2McDonnell/Sources/main.asm index 6c18720..3652de5 100644 --- a/cmpen472hw2McDonnell/Sources/main.asm +++ b/cmpen472hw2McDonnell/Sources/main.asm @@ -34,7 +34,11 @@ * LED 4 at PORTB bit 7
*
* Observation: This program that blinks LEDs and blinking period can
-* be changed with the delay loop counter value.
+* be changed with the delay loop counter value. When switch 1
+* is not pressed, LEDs 1 and 4 will blink alternately for 1
+* second each. When switch 1 is pressed LEDs 1, 2, 3, & 4 will
+* all turn on at the same time for 1 second and turn off at the
+* same time for 1 second.
*
* Note: All Homework programs MUST have comments similar
* to this Homework 2 program. So, please use those
@@ -84,29 +88,15 @@ pgstart lds #$3100 ; initialize the stack pointer staa PORTB ; Turn off LED 1, 2, 3, 4 (all bits in PORTB, for simulation
mainLoop
- bset PORTB,%10000000 ; Turn ON LED 4 at PORTB bit 7
- bclr PORTB,%00010000 ; Turn off LED 1 at PORTB bit 4
- jsr delay1sec ; Wait for 1 second
-
- bclr PORTB,%10000000 ; Turn off LED 4 at PORTB bit 7
- bset PORTB,%00010000 ; Turn on LED 1 at PORTB bit 4
- jsr delay1sec ; Wait for 1 second
-
- bra checkSwitch ; jump to check if Switch 1 is pressed
-
-allBlink bset PORTB,%11110000 ; Turn ON all 4 LEDs
- jsr delay1sec ; Wait for 1 second
-
- bclr PORTB,%11110000 ; Turn off all 4 LEDs
- jsr delay1sec ; Wait for 1 second
-
-checkSwitch ldaa PORTB
+ ldaa PORTB
anda #%00000001 ; Read switch 1 at PORTB bit 0
bne sw1pushed ; check to see if it is pushed
-sw1notpsh bra mainLoop ; jump to mainLoop so LEDs 1 & 4 alternate
+sw1notpsh jsr alternate ; Jump to the alternate subroutine to alternate LED 1 and 4
+ bra mainLoop ; loop back to the beginning to check the switch
-sw1pushed bra allBlink ; jump to allBlink so all 4 LEDs blink
+sw1pushed jsr allBlink ; Jump to the allBlink subroutine to blink all lights
+ bra mainLoop ; loop back to the beginning to check the switch
**************************************************************************
* Subroutine Section: address used [ $3100 to $3FFF ] RAM Memory
@@ -117,9 +107,9 @@ sw1pushed bra allBlink ; jump to allBlink so all 4 LEDs blink ;
; This subroutine will delay for 1 second
;
-; Input: a 16 bit count number in 'Counter2'
-; Output: time delay of 1 second, cpu cycles wasted
-; Registers in use: Y register as counter
+; Input: a 16 bit count number in 'Counter2'
+; Output: time delay of 1 second, cpu cycles wasted
+; Registers in use: Y register as counter
; Memory locations in use: a 16bit input number at 'Counter2'
;
; Comments: This subroutine requires delayMS subroutine
@@ -159,6 +149,52 @@ dlyMSLoop nop ; total time delay = X * NOP pulx ; restore X
rts ; return
+
+;*************************************************************************
+; alternate subroutine
+;
+; This subroutine will alternately blink LEDs 1 anf 4 for 1 second each.
+;
+; Input: No input all values are hardcoded
+; Output: LEDs 1 and 4 blinking alternately
+; Registers in use: No registers are used
+; Memory locations in use: A one byte memory location associated with PORTB ($0001)
+;
+; Comments: This subroutine requires delay1sec subroutine.
+;
+
+alternate
+ bset PORTB,%10000000 ; Turn ON LED 4 at PORTB bit 7
+ bclr PORTB,%00010000 ; Turn off LED 1 at PORTB bit 4
+ jsr delay1sec ; Wait for 1 second
+
+ bclr PORTB,%10000000 ; Turn off LED 4 at PORTB bit 7
+ bset PORTB,%00010000 ; Turn on LED 1 at PORTB bit 4
+ jsr delay1sec ; Wait for 1 second
+ rts ; Return to the caller
+
+;*************************************************************************
+; allBlink subroutine
+;
+; This subroutine will blink LEDs 1, 2, 3, & 4 on for 1 second and off for
+; 1 second all at the same time.
+;
+; Input: No input all values are hardcoded
+; Output: LEDs 1, 2, 3, & 4 blinking on and off at the
+; same time for 1 second
+; Registers in use: No registers are used
+; Memory locations in use: A one byte memory location associated with PORTB ($0001)
+;
+; Comments: This subroutine requires delay1sec subroutine.
+;
+
+allBlink
+ bset PORTB,%11110000 ; Turn ON all 4 LEDs
+ jsr delay1sec ; Wait for 1 second
+
+ bclr PORTB,%11110000 ; Turn off all 4 LEDs
+ jsr delay1sec ; Wait for 1 second
+ rts ; Return to the caller
*
* Add any subroutines here
diff --git a/cmpen472hw2McDonnell/bin/Project.abs b/cmpen472hw2McDonnell/bin/Project.abs Binary files differindex 8ad9790..2f19b93 100644 --- a/cmpen472hw2McDonnell/bin/Project.abs +++ b/cmpen472hw2McDonnell/bin/Project.abs diff --git a/cmpen472hw2McDonnell/bin/Project.abs.s19 b/cmpen472hw2McDonnell/bin/Project.abs.s19 index 1a3fcd4..d70bfa2 100644 --- a/cmpen472hw2McDonnell/bin/Project.abs.s19 +++ b/cmpen472hw2McDonnell/bin/Project.abs.s19 @@ -1,6 +1,6 @@ S0570000433A5C55736572735C4A61636F62204D63446F6E6E656C6C5C446F63756D656E74735C434D50454E2D3437322D48575C636D70656E3437326877324D63446F6E6E656C6C5C62696E5C50726F6A6563742E616273AE
S1073000010000BF08
-S1233100CF310086FF5A0386005A014C01804D01101631354D01804C0110163135200C4C22
-S123312001F01631354D01F016313596018401260220D820EA35FD30021631410326FA31DE
-S10E31403D34FE3000A70926FC303DA2
+S1233100CF310086FF5A0386005A0196018401260516311B20F516312E20F04C01804D018A
+S12331201016313B4D01804C011016313B3D4C01F016313B4D01F016313B3D35FD300216D9
+S114314031470326FA313D34FE3000A70926FC303DD0
S9030000FC
diff --git a/cmpen472hw2McDonnell/bin/main.dbg b/cmpen472hw2McDonnell/bin/main.dbg index 33c5832..9b504c7 100644 --- a/cmpen472hw2McDonnell/bin/main.dbg +++ b/cmpen472hw2McDonnell/bin/main.dbg @@ -84,6 +84,21 @@ pgstart lds #$3100 ; initialize the stack pointer staa PORTB ; Turn off LED 1, 2, 3, 4 (all bits in PORTB, for simulation
mainLoop
+ ldaa PORTB
+ anda #%00000001 ; Read switch 1 at PORTB bit 0
+ bne sw1pushed ; check to see if it is pushed
+
+sw1notpsh jsr alternate ; Jump to the alternate subroutine to alternate LED 1 and 4
+ bra mainLoop ; loop back to the beginning to check the switch
+
+sw1pushed jsr allBlink ; Jump to the allBlink subroutine to blink all lights
+ bra mainLoop ; loop back to the beginning to check the switch
+
+**************************************************************************
+* Subroutine Section: address used [ $3100 to $3FFF ] RAM Memory
+*
+
+alternate
bset PORTB,%10000000 ; Turn ON LED 4 at PORTB bit 7
bclr PORTB,%00010000 ; Turn off LED 1 at PORTB bit 4
jsr delay1sec ; Wait for 1 second
@@ -91,26 +106,15 @@ mainLoop bclr PORTB,%10000000 ; Turn off LED 4 at PORTB bit 7
bset PORTB,%00010000 ; Turn on LED 1 at PORTB bit 4
jsr delay1sec ; Wait for 1 second
-
- bra checkSwitch ; jump to check if Switch 1 is pressed
-
-allBlink bset PORTB,%11110000 ; Turn ON all 4 LEDs
+ rts ; Return to the caller
+
+allBlink
+ bset PORTB,%11110000 ; Turn ON all 4 LEDs
jsr delay1sec ; Wait for 1 second
bclr PORTB,%11110000 ; Turn off all 4 LEDs
jsr delay1sec ; Wait for 1 second
-
-checkSwitch ldaa PORTB
- anda #%00000001 ; Read switch 1 at PORTB bit 0
- bne sw1pushed ; check to see if it is pushed
-
-sw1notpsh bra mainLoop ; jump to mainLoop so LEDs 1 & 4 alternate
-
-sw1pushed bra allBlink ; jump to allBlink so all 4 LEDs blink
-
-**************************************************************************
-* Subroutine Section: address used [ $3100 to $3FFF ] RAM Memory
-*
+ rts ; Return to the caller
;*************************************************************************
; delay1sec subroutine
diff --git a/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/ObjectCode/main.asm.o b/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/ObjectCode/main.asm.o Binary files differindex 8ad9790..2f19b93 100644 --- a/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/ObjectCode/main.asm.o +++ b/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/ObjectCode/main.asm.o diff --git a/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/ObjectCode/main.asm.sx b/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/ObjectCode/main.asm.sx index 9c1ec46..74843a2 100644 --- a/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/ObjectCode/main.asm.sx +++ b/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/ObjectCode/main.asm.sx @@ -1,6 +1,6 @@ S0820000433A5C55736572735C4A61636F62204D63446F6E6E656C6C5C446F63756D656E74735C434D50454E2D3437322D48575C636D70656E3437326877324D63446F6E6E656C6C5C636D70656E3437326877324D63446F6E6E656C6C5F446174615C5374616E646172645C4F626A656374436F64655C6D61696E2E61736D2E70726D95
S1073000010000BF08
-S1233100CF310086FF5A0386005A014C01804D01101631354D01804C0110163135200C4C22
-S123312001F01631354D01F016313596018401260220D820EA35FD30021631410326FA31DE
-S10E31403D34FE3000A70926FC303DA2
+S1233100CF310086FF5A0386005A0196018401260516311B20F516312E20F04C01804D018A
+S12331201016313B4D01804C011016313B3D4C01F016313B4D01F016313B3D35FD300216D9
+S114314031470326FA313D34FE3000A70926FC303DD0
S9033100CB
diff --git a/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/TargetDataWindows.tdt b/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/TargetDataWindows.tdt Binary files differindex 701e4c4..a3b4b88 100644 --- a/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/TargetDataWindows.tdt +++ b/cmpen472hw2McDonnell/cmpen472hw2McDonnell_Data/Standard/TargetDataWindows.tdt diff --git a/cmpen472hw3McDonnell/ASM_layout.hwl b/cmpen472hw3McDonnell/ASM_layout.hwl new file mode 100644 index 0000000..3600632 --- /dev/null +++ b/cmpen472hw3McDonnell/ASM_layout.hwl @@ -0,0 +1,18 @@ +OPEN source 0 0 60 42
+Source < attributes MARKS off
+OPEN assembly 60 0 40 30
+Assembly < attributes ADR on,CODE off,ABSADR on,SYMB off,TOPPC 0xF800
+OPEN procedure 60 60 40 17
+Procedure < attributes VALUES on,TYPES off
+OPEN register 60 30 40 30
+Register < attributes FORMAT AUTO,COMPLEMENT None
+OPEN memory 60 77 40 23
+Memory < attributes FORMAT hex,COMPLEMENT None,WORD 1,ASC on,ADR on,ADDRESS 0x80
+OPEN data 0 42 60 28
+Data < attributes SCOPE global,COMPLEMENT None,FORMAT Symb,MODE automatic,UPDATERATE 10,NAMEWIDTH 16
+OPEN command 0 70 60 30
+Command < attributes CACHESIZE 1000
+bckcolor 50331647
+font 'Courier New' 9 BLACK
+AUTOSIZE on
+ACTIVATE Assembly Memory Register Command Data Source Procedure
diff --git a/cmpen472hw3McDonnell/Default.mem b/cmpen472hw3McDonnell/Default.mem Binary files differnew file mode 100644 index 0000000..bf49148 --- /dev/null +++ b/cmpen472hw3McDonnell/Default.mem diff --git a/cmpen472hw3McDonnell/Full_Chip_Simulation.hwc b/cmpen472hw3McDonnell/Full_Chip_Simulation.hwc new file mode 100644 index 0000000..ae80da7 --- /dev/null +++ b/cmpen472hw3McDonnell/Full_Chip_Simulation.hwc @@ -0,0 +1 @@ +LOADMEM default.mem
diff --git a/cmpen472hw3McDonnell/Full_Chip_Simulation.hwl b/cmpen472hw3McDonnell/Full_Chip_Simulation.hwl new file mode 100644 index 0000000..0e6a666 --- /dev/null +++ b/cmpen472hw3McDonnell/Full_Chip_Simulation.hwl @@ -0,0 +1,26 @@ +OPEN source 0 0 60 42
+Source < attributes TOOLTIP on,TOOLTIP_FORMAT signed,TOOLTIP_MODE details,FREEZE off,MARKS off
+OPEN assembly 60 0 40 30
+Assembly < attributes ADR on,CODE off,ABSADR on,SYMB off,FORMAT Auto,FREEZE off,TOPPC 0xCBCB
+OPEN procedure 60 60 40 17
+Procedure < attributes VALUES on,TYPES off
+OPEN register 60 30 40 30
+Register < attributes FORMAT AUTO,COMPLEMENT None
+OPEN memory 60 77 40 23
+Memory < attributes FORMAT hex,COMPLEMENT None,WORD 1,ASC on,ADR on,MODE automatic,UPDATERATE 10,ADDRESS 0x80
+OPEN data 0 42 60 28
+Data < attributes SCOPE global,COMPLEMENT None,FORMAT Symb,MODE automatic,SORT NotSort,UPDATERATE 10,NAMEWIDTH 16
+OPEN command 0 70 60 30
+Command < attributes CACHESIZE 1000
+OPEN Visualizationtool 63 50 26 29
+VisualizationTool< Attributes [stEditM="0",swGridMode="1",swRefresh="3",refCycles="1"]
+VisualizationTool< LoadInstrument LED[BoundX="102",BoundY="40",Port="0x0001",Port_PortEndian="1",swBIT="7"]
+VisualizationTool< LoadInstrument LED[BoundX="133",BoundY="41",Port="0x0001",Port_PortEndian="1",swBIT="6"]
+VisualizationTool< LoadInstrument LED[BoundX="166",BoundY="37",Port="0x0001",Port_PortEndian="1",swBIT="5"]
+VisualizationTool< LoadInstrument LED[BoundX="202",BoundY="42",Port="0x0001",Port_PortEndian="1",swBIT="4"]
+VisualizationTool< LoadInstrument DILSwitch[BoundX="83",BoundY="106",Port="0x0001"]
+VisualizationTool< ResetVT Undo
+bckcolor 50331647
+font 'Courier New' 9 BLACK
+AUTOSIZE on
+ACTIVATE "Assembly" "Memory" "Register" "Command" "Data" "Procedure" "Source" "VisualizationTool"
diff --git a/cmpen472hw3McDonnell/Full_Chip_Simulation.ini b/cmpen472hw3McDonnell/Full_Chip_Simulation.ini new file mode 100644 index 0000000..b9b9983 --- /dev/null +++ b/cmpen472hw3McDonnell/Full_Chip_Simulation.ini @@ -0,0 +1,49 @@ +[Environment Variables]
+GENPATH={Project}Sources;{Compiler}lib\hc12c\src;{Compiler}lib\hc12c\include;{Compiler}lib\hc12c\lib;{Compiler}lib\xgatec\src;{Compiler}lib\xgatec\include;{Compiler}lib\xgatec\lib
+LIBPATH={Compiler}lib\hc12c\include;{Compiler}lib\xgatec\include
+OBJPATH={Project}bin
+TEXTPATH={Project}bin
+ABSPATH={Project}bin
+
+[HI-WAVE]
+Target=sim
+Layout=Full_Chip_Simulation.hwl
+LoadDialogOptions=AUTOERASEANDFLASH NORUNAFTERLOAD
+CPU=HC12
+MainFrame=0,1,-1,-1,-1,-1,514,197,1729,1220
+Configuration=Full_Chip_Simulation.hwc
+Statusbar=1
+ShowToolbar=1
+Smallborder=0
+Hideheadline=0
+Hidetitle=0
+TOOLBAR=57600 57601 32795 0 57635 57634 57637 0 57671 57669 0 32777 32776 32782 32780 32781 32778 0 32806
+
+
+
+
+
+
+
+
+
+[Simulator]
+CMDFILE0=CMDFILE STARTUP ON ".\cmd\Full_Chip_Simulation_startup.cmd"
+
+[Simulator HC12]
+CMDFILE0=CMDFILE RESET ON ".\cmd\Full_Chip_Simulation_reset.cmd"
+CMDFILE1=CMDFILE PRELOAD ON ".\cmd\Full_Chip_Simulation_preload.cmd"
+CMDFILE2=CMDFILE POSTLOAD ON ".\cmd\Full_Chip_Simulation_postload.cmd"
+CMDFILE3=CMDFILE SETCPU ON ".\cmd\Full_Chip_Simulation_setcpu.cmd"
+HCS12_SUPPORT=1
+FCS=MC9S12C32
+ZEROTIMEATRESET=1
+OSCFREQUENCY=48000000
+DISPLAYTIME=0
+
+
+[Recent Layout File List]
+File0=ASM_layout.hwl
+File1=
+File2=
+File3=
diff --git a/cmpen472hw3McDonnell/Sources/derivative.inc b/cmpen472hw3McDonnell/Sources/derivative.inc new file mode 100644 index 0000000..9320da5 --- /dev/null +++ b/cmpen472hw3McDonnell/Sources/derivative.inc @@ -0,0 +1,10 @@ +
+ ; Note: This file is recreated by the project wizard whenever the MCU is
+ ; changed and should not be edited by hand
+ ;
+
+ ; include derivative specific macros
+ INCLUDE 'mc9s12c32.inc'
+
+
+
diff --git a/cmpen472hw3McDonnell/Sources/main.asm b/cmpen472hw3McDonnell/Sources/main.asm new file mode 100644 index 0000000..592bf1b --- /dev/null +++ b/cmpen472hw3McDonnell/Sources/main.asm @@ -0,0 +1,160 @@ +**************************************************************************
+* Parameter Declearation Section
+*
+* Export Symbols
+ xdef pgstart ; export 'pgstart' symbol
+ absentry pgstart ; for assembly entry point
+
+* Symbols and Macros
+PORTA equ $0000 ; i/o port A addresses
+DDRA equ $0002 ; data direction register for PORTA
+PORTB equ $0001 ; i/o port B addresses
+DDRB equ $0003 ; data direction register for PORTB
+
+**************************************************************************
+* Data Section: address used [ $3000 to $30FF ] RAM Memory
+*
+ org $3000 ; Reserved RAM memory starting address
+ ; for Data for CMPEN 472 class
+Counter1 dc.w $008f ; X register count number for time Delay
+ ; inner loop for msec
+Counter2 dc.w $000c ; Y register count number for time delay
+ ; output loop for sec
+*
+**************************************************************************
+* Program Section: address used [ $3100 to $3FFF ] RAM Memory
+*
+ org $3100 ; Program start address, in RAM
+pgstart lds #$3100 ; initialize the stack pointer
+
+ ldaa #%11110001 ; LED 1,2,3,4 at PORTB bit 4,5,6,7
+ staa DDRB ; set PORTB bit 4,5,6,7 as output
+
+
+ ldaa #%00000000
+ staa PORTB ; clear all bits of PORTB
+
+mainLoop
+ ldaa PORTB ; check bit 0 of PORTB, switch 1
+ anda #%00000001 ; if 0, run blinkLED4 20% light level
+ bne p80LED4 ; if 1, run blinkLED4 80% light level
+
+p20LED4
+ jsr LED4on ; 20% light level (duty cycle)
+ jsr LED4on
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ bra mainLoop ; check switch, loop forever
+
+p80LED4
+ jsr LED4on ; 80% light level (duty cycle)
+ jsr LED4on
+ jsr LED4on
+ jsr LED4on
+ jsr LED4on
+ jsr LED4on
+ jsr LED4on
+ jsr LED4on
+ jsr LED4off
+ jsr LED4off
+ bra mainLoop ; check switch, loop forever
+
+**************************************************************************
+* Subroutine Section: address used [ $3100 to $3FFF ] RAM Memory
+*
+
+;*************************************************************************
+; LED4off subroutine
+;
+; This subroutine will turn LED4 off and delay for 1 second
+;
+; Input: no input, parameters are hardcoded
+; Output: LED4 off and delay for 1 second, wasted cycles
+; Registers in use: A accumulator to turn LED4 off
+; Memory locations in use: A 16bit address parameter for PORTB
+;
+; Comments: This subroutine requires delay1sec subroutine
+;
+LED4off
+ psha ; save A register to the stack
+ ldaa #%01111111 ; turn off LED 4 at PORTB bit 7
+ anda PORTB
+ staa PORTB
+ jsr delay1sec ; wait for 1 second
+ pula ; restore A from the stack
+ rts ; return to caller
+
+;*************************************************************************
+; LED4on subroutine
+;
+; This subroutine will turn LED4 on and delay for 1 second
+;
+; Input: no input, parameters are hardcoded
+; Output: LED4 on and delay for 1 second, wasted cycles
+; Registers in use: A accumulator to turn LED4 on
+; Memory locations in use: A 16bit address parameter for PORTB
+;
+; Comments: This subroutine requires delay1sec subroutine
+;
+LED4on
+ psha ; save A register to the stack
+ ldaa #%10000000 ; turn on LED 4 at PORTB bit 7
+ oraa PORTB
+ staa PORTB
+ jsr delay1sec ; wait for 1 second
+ pula ; restore A from the stack
+ rts ; return to caller
+
+;*************************************************************************
+; delay1sec subroutine
+;
+; This subroutine will delay for 1 second
+;
+; Input: a 16 bit count number in 'Counter2'
+; Output: time delay of 1 second, cpu cycles wasted
+; Registers in use: Y register as counter
+; Memory locations in use: a 16bit input number at 'Counter2'
+;
+; Comments: This subroutine requires delayMS subroutine
+;
+
+delay1sec
+ pshy ; save Y to the stack
+ ldy Counter2 ; long delay by the value of Counter2
+
+dly1Loop jsr delayMS ; total time delay = Y * delayMS
+ dey
+ bne dly1Loop
+
+ puly ; restore y from the stack
+ rts ; return
+
+;*************************************************************************
+; delayMS subroutine
+;
+; This subroutine causes a few msec. Delay
+;
+; Input: a 16bit count number in 'Counter1'
+; Output: time delay, cpu cycle wasted
+; Registers in use: X register, as counter
+; Memory locations in use: a 16bit input number at 'Counter1'
+;
+; Comments: one can add more NOP instructions to lengthen the delay time.
+;
+
+delayMS
+ pshx ; save X to the stack
+ ldx Counter1 ; short Delay
+
+dlyMSLoop nop ; total time delay = X * NOP
+ dex
+ bne dlyMSLoop
+
+ pulx ; restore X
+ rts ; return
diff --git a/cmpen472hw3McDonnell/bin/Project.abs b/cmpen472hw3McDonnell/bin/Project.abs Binary files differnew file mode 100644 index 0000000..38dfc39 --- /dev/null +++ b/cmpen472hw3McDonnell/bin/Project.abs diff --git a/cmpen472hw3McDonnell/bin/Project.abs.phy b/cmpen472hw3McDonnell/bin/Project.abs.phy new file mode 100644 index 0000000..7351f80 --- /dev/null +++ b/cmpen472hw3McDonnell/bin/Project.abs.phy @@ -0,0 +1,2 @@ +S04A0000433A5C55736572735C4A61636F62204D63446F6E6E656C6C5C446F63756D656E74735C636D70656E3437326877334D63446F6E6E656C6C5C62696E5C50726F6A6563742E6162731F
+S9030000FC
diff --git a/cmpen472hw3McDonnell/bin/Project.abs.s19 b/cmpen472hw3McDonnell/bin/Project.abs.s19 new file mode 100644 index 0000000..59324e5 --- /dev/null +++ b/cmpen472hw3McDonnell/bin/Project.abs.s19 @@ -0,0 +1,7 @@ +S04A0000433A5C55736572735C4A61636F62204D63446F6E6E656C6C5C446F63756D656E74735C636D70656E3437326877334D63446F6E6E656C6C5C62696E5C50726F6A6563742E6162731F
+S1073000008F000C2D
+S1233100CF310086F15A0386005A0196018401262016315D16315D16315116315116315184
+S123312016315116315116315116315116315120DA16315D16315D16315D16315D16315D65
+S123314016315D16315D16315D16315116315120BA36867F94015A01163169323D368680EF
+S12231609A015A01163169323D35FD30021631750326FA313D34FE3000A70926FC303DE5
+S9030000FC
diff --git a/cmpen472hw3McDonnell/bin/main.dbg b/cmpen472hw3McDonnell/bin/main.dbg new file mode 100644 index 0000000..592bf1b --- /dev/null +++ b/cmpen472hw3McDonnell/bin/main.dbg @@ -0,0 +1,160 @@ +**************************************************************************
+* Parameter Declearation Section
+*
+* Export Symbols
+ xdef pgstart ; export 'pgstart' symbol
+ absentry pgstart ; for assembly entry point
+
+* Symbols and Macros
+PORTA equ $0000 ; i/o port A addresses
+DDRA equ $0002 ; data direction register for PORTA
+PORTB equ $0001 ; i/o port B addresses
+DDRB equ $0003 ; data direction register for PORTB
+
+**************************************************************************
+* Data Section: address used [ $3000 to $30FF ] RAM Memory
+*
+ org $3000 ; Reserved RAM memory starting address
+ ; for Data for CMPEN 472 class
+Counter1 dc.w $008f ; X register count number for time Delay
+ ; inner loop for msec
+Counter2 dc.w $000c ; Y register count number for time delay
+ ; output loop for sec
+*
+**************************************************************************
+* Program Section: address used [ $3100 to $3FFF ] RAM Memory
+*
+ org $3100 ; Program start address, in RAM
+pgstart lds #$3100 ; initialize the stack pointer
+
+ ldaa #%11110001 ; LED 1,2,3,4 at PORTB bit 4,5,6,7
+ staa DDRB ; set PORTB bit 4,5,6,7 as output
+
+
+ ldaa #%00000000
+ staa PORTB ; clear all bits of PORTB
+
+mainLoop
+ ldaa PORTB ; check bit 0 of PORTB, switch 1
+ anda #%00000001 ; if 0, run blinkLED4 20% light level
+ bne p80LED4 ; if 1, run blinkLED4 80% light level
+
+p20LED4
+ jsr LED4on ; 20% light level (duty cycle)
+ jsr LED4on
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ jsr LED4off
+ bra mainLoop ; check switch, loop forever
+
+p80LED4
+ jsr LED4on ; 80% light level (duty cycle)
+ jsr LED4on
+ jsr LED4on
+ jsr LED4on
+ jsr LED4on
+ jsr LED4on
+ jsr LED4on
+ jsr LED4on
+ jsr LED4off
+ jsr LED4off
+ bra mainLoop ; check switch, loop forever
+
+**************************************************************************
+* Subroutine Section: address used [ $3100 to $3FFF ] RAM Memory
+*
+
+;*************************************************************************
+; LED4off subroutine
+;
+; This subroutine will turn LED4 off and delay for 1 second
+;
+; Input: no input, parameters are hardcoded
+; Output: LED4 off and delay for 1 second, wasted cycles
+; Registers in use: A accumulator to turn LED4 off
+; Memory locations in use: A 16bit address parameter for PORTB
+;
+; Comments: This subroutine requires delay1sec subroutine
+;
+LED4off
+ psha ; save A register to the stack
+ ldaa #%01111111 ; turn off LED 4 at PORTB bit 7
+ anda PORTB
+ staa PORTB
+ jsr delay1sec ; wait for 1 second
+ pula ; restore A from the stack
+ rts ; return to caller
+
+;*************************************************************************
+; LED4on subroutine
+;
+; This subroutine will turn LED4 on and delay for 1 second
+;
+; Input: no input, parameters are hardcoded
+; Output: LED4 on and delay for 1 second, wasted cycles
+; Registers in use: A accumulator to turn LED4 on
+; Memory locations in use: A 16bit address parameter for PORTB
+;
+; Comments: This subroutine requires delay1sec subroutine
+;
+LED4on
+ psha ; save A register to the stack
+ ldaa #%10000000 ; turn on LED 4 at PORTB bit 7
+ oraa PORTB
+ staa PORTB
+ jsr delay1sec ; wait for 1 second
+ pula ; restore A from the stack
+ rts ; return to caller
+
+;*************************************************************************
+; delay1sec subroutine
+;
+; This subroutine will delay for 1 second
+;
+; Input: a 16 bit count number in 'Counter2'
+; Output: time delay of 1 second, cpu cycles wasted
+; Registers in use: Y register as counter
+; Memory locations in use: a 16bit input number at 'Counter2'
+;
+; Comments: This subroutine requires delayMS subroutine
+;
+
+delay1sec
+ pshy ; save Y to the stack
+ ldy Counter2 ; long delay by the value of Counter2
+
+dly1Loop jsr delayMS ; total time delay = Y * delayMS
+ dey
+ bne dly1Loop
+
+ puly ; restore y from the stack
+ rts ; return
+
+;*************************************************************************
+; delayMS subroutine
+;
+; This subroutine causes a few msec. Delay
+;
+; Input: a 16bit count number in 'Counter1'
+; Output: time delay, cpu cycle wasted
+; Registers in use: X register, as counter
+; Memory locations in use: a 16bit input number at 'Counter1'
+;
+; Comments: one can add more NOP instructions to lengthen the delay time.
+;
+
+delayMS
+ pshx ; save X to the stack
+ ldx Counter1 ; short Delay
+
+dlyMSLoop nop ; total time delay = X * NOP
+ dex
+ bne dlyMSLoop
+
+ pulx ; restore X
+ rts ; return
diff --git a/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Postload.cmd b/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Postload.cmd new file mode 100644 index 0000000..eb00f37 --- /dev/null +++ b/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Postload.cmd @@ -0,0 +1 @@ +// After load the commands written below will be executed
diff --git a/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Preload.cmd b/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Preload.cmd new file mode 100644 index 0000000..691c5ee --- /dev/null +++ b/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Preload.cmd @@ -0,0 +1 @@ +// Before load the commands written below will be executed
diff --git a/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Reset.cmd b/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Reset.cmd new file mode 100644 index 0000000..f0fc874 --- /dev/null +++ b/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Reset.cmd @@ -0,0 +1 @@ +// After reset the commands written below will be executed
diff --git a/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_SetCPU.cmd b/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_SetCPU.cmd new file mode 100644 index 0000000..5f2b5a5 --- /dev/null +++ b/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_SetCPU.cmd @@ -0,0 +1 @@ +// At startup the commands written below will be executed
diff --git a/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Startup.cmd b/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Startup.cmd new file mode 100644 index 0000000..5f2b5a5 --- /dev/null +++ b/cmpen472hw3McDonnell/cmd/Full_Chip_Simulation_Startup.cmd @@ -0,0 +1 @@ +// At startup the commands written below will be executed
diff --git a/cmpen472hw3McDonnell/cmpen472hw3McDonnell.mcp b/cmpen472hw3McDonnell/cmpen472hw3McDonnell.mcp Binary files differnew file mode 100644 index 0000000..19b4bdd --- /dev/null +++ b/cmpen472hw3McDonnell/cmpen472hw3McDonnell.mcp diff --git a/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/CWSettingsWindows.stg b/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/CWSettingsWindows.stg Binary files differnew file mode 100644 index 0000000..da25121 --- /dev/null +++ b/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/CWSettingsWindows.stg diff --git a/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/Standard/ObjectCode/main.asm.o b/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/Standard/ObjectCode/main.asm.o Binary files differnew file mode 100644 index 0000000..38dfc39 --- /dev/null +++ b/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/Standard/ObjectCode/main.asm.o diff --git a/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/Standard/ObjectCode/main.asm.sx b/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/Standard/ObjectCode/main.asm.sx new file mode 100644 index 0000000..942adfa --- /dev/null +++ b/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/Standard/ObjectCode/main.asm.sx @@ -0,0 +1,7 @@ +S0750000433A5C55736572735C4A61636F62204D63446F6E6E656C6C5C446F63756D656E74735C636D70656E3437326877334D63446F6E6E656C6C5C636D70656E3437326877334D63446F6E6E656C6C5F446174615C5374616E646172645C4F626A656374436F64655C6D61696E2E61736D2E70726D05
+S1073000008F000C2D
+S1233100CF310086F15A0386005A0196018401262016315D16315D16315116315116315184
+S123312016315116315116315116315116315120DA16315D16315D16315D16315D16315D65
+S123314016315D16315D16315D16315116315120BA36867F94015A01163169323D368680EF
+S12231609A015A01163169323D35FD30021631750326FA313D34FE3000A70926FC303DE5
+S9033100CB
diff --git a/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/Standard/TargetDataWindows.tdt b/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/Standard/TargetDataWindows.tdt Binary files differnew file mode 100644 index 0000000..bcd0560 --- /dev/null +++ b/cmpen472hw3McDonnell/cmpen472hw3McDonnell_Data/Standard/TargetDataWindows.tdt diff --git a/cmpen472hw3McDonnell/prm/burner.bbl b/cmpen472hw3McDonnell/prm/burner.bbl new file mode 100644 index 0000000..42c21ed --- /dev/null +++ b/cmpen472hw3McDonnell/prm/burner.bbl @@ -0,0 +1,157 @@ +/* logical s-record file */
+OPENFILE "%ABS_FILE%.s19"
+format=motorola
+busWidth=1
+origin=0
+len=0x1000000
+destination=0
+SRECORD=Sx
+SENDBYTE 1 "%ABS_FILE%"
+CLOSE
+
+
+/* physical s-record file */
+OPENFILE "%ABS_FILE%.phy"
+format = motorola
+busWidth = 1
+len = 0x4000
+
+/* logical non banked flash at $4000 and $C000 to physical */
+origin = 0x004000
+destination = 0x0F8000
+SENDBYTE 1 "%ABS_FILE%"
+
+origin = 0x00C000
+destination = 0x0FC000
+SENDBYTE 1 "%ABS_FILE%"
+
+/* physical FTS512K flash window to physical
+origin = 0x008000
+destination = 0x080000
+SENDBYTE 1 "%ABS_FILE%"
+*/
+
+/* physical FTS256K parts flash window to physical
+origin = 0x008000
+destination = 0x0C0000
+SENDBYTE 1 "%ABS_FILE%"
+*/
+
+/* physical FTS128K parts flash window to physical
+origin = 0x008000
+destination = 0x0E0000
+SENDBYTE 1 "%ABS_FILE%"
+*/
+
+/* physical FTS64K parts flash window to physical
+origin = 0x008000
+destination = 0x0F0000
+SENDBYTE 1 "%ABS_FILE%"
+*/
+
+/* physical FTS32K parts flash window to physical
+origin = 0x008000
+destination = 0x0F8000
+SENDBYTE 1 "%ABS_FILE%"
+*/
+
+/* logical 512 kB banked flash to physical */
+origin = 0x208000
+destination = 0x080000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x218000
+destination = 0x084000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x228000
+destination = 0x088000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x238000
+destination = 0x08C000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x248000
+destination = 0x090000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x258000
+destination = 0x094000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x268000
+destination = 0x098000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x278000
+destination = 0x09C000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x288000
+destination = 0x0A0000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x298000
+destination = 0x0A4000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x2A8000
+destination = 0x0A8000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x2B8000
+destination = 0x0AC000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x2C8000
+destination = 0x0B0000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x2D8000
+destination = 0x0B4000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x2E8000
+destination = 0x0B8000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x2F8000
+destination = 0x0BC000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x308000
+destination = 0x0C0000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x318000
+destination = 0x0C4000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x328000
+destination = 0x0C8000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x338000
+destination = 0x0CC000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x348000
+destination = 0x0D0000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x358000
+destination = 0x0D4000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x368000
+destination = 0x0D8000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x378000
+destination = 0x0DC000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x388000
+destination = 0x0E0000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x398000
+destination = 0x0E4000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x3A8000
+destination = 0x0E8000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x3B8000
+destination = 0x0EC000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x3C8000
+destination = 0x0F0000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x3D8000
+destination = 0x0F4000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x3E8000
+destination = 0x0F8000
+SENDBYTE 1 "%ABS_FILE%"
+origin = 0x3F8000
+destination = 0x0FC000
+SENDBYTE 1 "%ABS_FILE%"
+
+CLOSE
+
|