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+.TH LDE 10.5 UCDS
+.SH NAME
+lde \- logic design expression language format
+.SH DESCRIPTION
+.I Lde
+format contains six declaration areas that must appear
+in the following order:
+.TP
+.B .x
+an optional chip declaration area,
+.TP
+.B .tt
+an optional line for use by
+.I wcheck and/or
+.IR smoke ,
+.TP
+.B .i
+an input declaration area,
+.TP
+.B .o
+an output declaration area,
+.TP
+.B .f
+an optional field declaration area,
+.TP
+.B .e
+and an expression area.
+.PP
+The
+.I lde
+language is much like C.
+Identifiers may include
+.BR +-. .
+.I Lde
+does not
+use ';' to end a statement.
+Symbols must be declared before used.
+Declaration is by appearance in the
+.B .i
+or
+.B .o
+areas or appearance on the left of an
+.B =
+in the
+.B .f
+or
+.B .e
+areas.
+Since
+.I lde
+is an expression language, no flow control (such as
+.B if
+or
+.BR switch )
+is allowed.
+An expression selector is available;
+.I
+expra{[[exprb]:]exprc,[[exprd]:]expre,...}
+has the value of
+.I exprc
+if
+.I expra
+equals
+.IR exprb .
+If there is no
+.I exprb
+and there is a colon then
+.I exprc
+is the default case.
+If there is no
+.I exprb
+and no colon the the pre-incremented value of the prior
+value of
+.I exprb
+is used, the prior value of
+.I exprb
+is initialized to \-1.
+.PP
+The chip declaration area may contain two strings,
+.IR name and type .
+.PP
+The
+.B .i
+and
+.B .o
+areas contain
+.I
+identifier
+[ '=' or ':'
+.I
+numeric_pinnumber
+]
+(The ':' is used by
+.I
+lde \-w
+as a mark for externals.)
+Some programs use the order of appearance of the
+identifiers.
+.PP
+The field declaration area contains constructions
+of the form
+.I n_id
+=
+.I o_id o_id ...
+where
+.I n_id
+is a new identifier for a multibit value the least significant
+bit of which is the first old identifier,
+.I o_id.
+.PP
+The expression area contains assignments of expressions to
+identifiers.
+Identifiers may be modified by a postpended single quote, "'",
+in which case a value of one has the meaning "don't_care" for the unmodified
+indentifier.
+.PP
+Numeric values may be passed from the command line, they appear as
+.BR $m .
+The (zero based)
+.RI m th
+occurence of
+.BI \- n
+one the command line substitutes the value
+.I n
+for the symbol
+.BR $m .
+.SH EXAMPLES
+.IP
+.ftCW
+.ps8
+.vs10
+.nf
+ /*
+ * bkrom
+ * classifies the location of the
+ * black king.
+ * 0-6 manhattan distance to center
+ * 7 orig square
+ * 8-11 k-side
+ * 12-15 q-side
+ */
+ .x
+ bkrom 74S287
+ .i
+ wkx0 wkx1 wkx2
+ wky0 wky1 wky2
+ GND1 GND2 GND3
+ .o
+ kb0 kb1 kb2 kb3
+ .f
+ kx = wkx0 wkx1 wkx2
+ ky = wky0 wky1 wky2
+ kb = kb0 kb1 kb2 kb3
+ .e
+ xd = (kx) { 3, 2, 1, 0, 0, 1, 2, 3 }
+ yd = (ky) { 3, 2, 1, 0, 0, 1, 2, 3 }
+ d = xd \+ yd
+ kb =
+ (ky == 6)?
+ (kx) { 12, 13, d, d, d, d, 8, 9 }:
+ (ky == 7)?
+ (kx) { 14, 15, d, d, 7, d, 10, 11 }:
+ d
+ /*
+ * By convention the output enable term for
+ * PAL's is 100 + the corresponding pin number.
+ * this example includes a .tt line for use by wcheck.
+ */
+ .x Bpal PAL16L8A
+ .tt iiiiiiiiign222222n2v
+ .i
+ A0 : 1 A1 : 2 A2 : 3 A3 : 4
+ A4 : 5 A5 : 6 A6 : 7 A7 : 8
+ A8 : 9
+ .o
+ SE+ : 12 RNE+ : 13 TD+ : 14 TU+ : 15
+ SFSE : 16 Y5 : 17 BRDY : 19
+
+ e12 = 112 e13 = 113 e14 = 114 e15 = 115
+ e16 = 116 e17 = 117 e19 = 119
+
+ .f
+ cnt = A0 A1 A2 A3 A4
+ ardy = A5
+ crdy = A6
+ flushb- = A8
+ flusha- = A7
+ .e
+ tmp = ((cnt == 0) ? ardy ? 1 : 0 :
+ (cnt == 6) ? (crdy || !flushb-) ? 1 : 0 : 1 )
+
+ /* shift enable + for major data path, also count enable */
+ SE+ = !tmp
+
+ /* random number clock enable - */
+ RNE+ = !(!flusha- ? 0 : tmp )
+
+ /* transfer down - for ireg */
+ TD+ = !((cnt == 0) && ardy)
+
+ /* transfer up + (invert outside) for oreg<0:3> */
+ TU+ = !((cnt == 6) && crdy && flushb-)
+
+ /* shift flush status enable */
+ SFSE = !(cnt == 3)
+
+ /* ack- back to ardy */
+ Y5 = !!((cnt == 0) && ardy)
+
+ /* ready to A */
+ BRDY = !( (cnt == 0)? 1 : 0)
+
+ e12 = 1 e13 = 1 e14 = 1 e15 = 1
+ e16 = 1 e17 = 1 e19 = 1
+ /*
+ * An example using parameter passing and Don't_care
+ */
+ .x dram PAL16R6
+ .tt iiiiiinnngin222222nv
+ .i
+ CK:1 OE-:11
+ dreq:2 stall:3 cerr:4 read:5 qword:6
+ rasefb=18 casxfb=17 casyfb=16 wefb=15
+ dsfb0=14 dsfb1=13
+ .o
+ rase:18 casx:17 casy:16 we:15
+ ds0:14
+ ds1:13
+ .f
+ DS = rase casx casy we ds1 ds0
+ DSfb = rasefb casxfb casyfb wefb dsfb1 dsfb0
+ .e
+ X.NCAS = 0100 /* don't care bits */
+
+ DC = 0200 /* don't care state */
+ S.RAS = 040
+ S.CAS = 020
+ S.NCAS = 010
+ S.WE = 004
+
+ /* low order 2 bits of state vector */
+ A = $0 B = $1 C = $2 D = $3
+
+ I0 = C /* state assignement */
+ D10 = S.RAS + A
+ D11 = S.RAS + S.CAS + X.NCAS + B
+ D12 = S.RAS + S.CAS + X.NCAS + A
+ D13 = S.RAS + S.NCAS + B
+ D23 = S.RAS + B
+ D14 = S.RAS + S.NCAS + D
+ D24 = S.RAS + D
+ D15 = S.RAS + S.NCAS + C
+ D25 = B
+ D16 = A
+ D26 = D
+ D31 = S.RAS + S.CAS + X.NCAS + D
+ D32 = S.RAS + S.CAS + X.NCAS + S.WE + A
+ D33 = S.RAS + S.NCAS + S.WE + B
+ D43 = S.RAS + S.CAS + X.NCAS + S.WE + B
+ D34 = S.RAS + S.NCAS + S.WE + D
+ D44 = S.RAS + S.CAS + X.NCAS + S.WE + D
+ D35 = S.RAS + S.NCAS + S.WE + C
+ D36 = S.WE
+
+ DS- = DSfb {
+ I0: dreq ? D10 : I0, /* idle state */
+ D10: read ? D11 : D31,
+ D31: stall ? D31 : D32,
+ D32: qword ? (stall ? D32 : D33) : D36,
+ D33: stall ? D43 : D34,
+ D43: stall ? D43 : D34,
+ D34: stall ? D44 : D35,
+ D44: stall ? D44 : D35,
+ D35: D36,
+ D36: I0,
+ D11: stall ? D11 : D12,
+ D12: qword ? D13 : D16,
+ D13: cerr ? D23 : D14,
+ D23: D14,
+ D14: cerr ? D24 : D15,
+ D24: D15,
+ D15: cerr ? D25 : D16,
+ D25: D16,
+ D16: cerr ? D26 : I0,
+ D26: dreq ? D10 : I0,
+ : DC
+ }
+
+ DS = 077 ^ DS-
+ DS' = (DS- == DC ) ? ~0 :
+ ((DS- & X.NCAS) ? S.NCAS : 0)
+.ft
+.ps
+.vs
+.nf