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diff --git a/static/freebsd/man4/gpio.4 3.html b/static/freebsd/man4/gpio.4 3.html new file mode 100644 index 00000000..7e024634 --- /dev/null +++ b/static/freebsd/man4/gpio.4 3.html @@ -0,0 +1,148 @@ +<table class="head"> + <tr> + <td class="head-ltitle">GPIO(4)</td> + <td class="head-vol">Device Drivers Manual</td> + <td class="head-rtitle">GPIO(4)</td> + </tr> +</table> +<div class="manual-text"> +<section class="Sh"> +<h1 class="Sh" id="NAME"><a class="permalink" href="#NAME">NAME</a></h1> +<p class="Pp"><code class="Nm">gpiobus</code> — <span class="Nd">GPIO bus + system</span></p> +</section> +<section class="Sh"> +<h1 class="Sh" id="SYNOPSIS"><a class="permalink" href="#SYNOPSIS">SYNOPSIS</a></h1> +<p class="Pp">To compile these devices into your kernel and use the device + hints, place the following lines in your kernel configuration file:</p> +<div class="Bd Pp Bd-indent"><code class="Cd">device gpio</code> +<br/> +<code class="Cd">device gpioiic</code> +<br/> +<code class="Cd">device gpioled</code></div> +<p class="Pp">Additional device entries for the <code class="Li">ARM</code> + architecture include:</p> +<div class="Bd Pp Bd-indent"><code class="Cd">device a10_gpio</code> +<br/> +<code class="Cd">device bcm_gpio</code> +<br/> +<code class="Cd">device imx51_gpio</code> +<br/> +<code class="Cd">device lpcgpio</code> +<br/> +<code class="Cd">device mv_gpio</code> +<br/> +<code class="Cd">device ti_gpio</code> +<br/> +<code class="Cd">device gpio_avila</code> +<br/> +<code class="Cd">device gpio_cambria</code> +<br/> +<code class="Cd">device zy7_gpio</code> +<br/> +<code class="Cd">device pxagpio</code></div> +<p class="Pp">Additional device entries for the <code class="Li">MIPS</code> + architecture include:</p> +<div class="Bd Pp Bd-indent"><code class="Cd">device ar71xxx_gpio</code> +<br/> +<code class="Cd">device octeon_gpio</code> +<br/> +<code class="Cd">device rt305_gpio</code></div> +<p class="Pp">Additional device entries for the <code class="Li">POWERPC</code> + architecture include:</p> +<div class="Bd Pp Bd-indent"><code class="Cd">device wiigpio</code> +<br/> +<code class="Cd">device macgpio</code></div> +<p class="Pp">Additional device entries for the <code class="Li">RISC-V</code> + architecture include:</p> +<div class="Bd Pp Bd-indent"><code class="Cd">device sifive_gpio</code></div> +</section> +<section class="Sh"> +<h1 class="Sh" id="DESCRIPTION"><a class="permalink" href="#DESCRIPTION">DESCRIPTION</a></h1> +<p class="Pp">The <code class="Nm">gpiobus</code> system provides a simple + interface to the GPIO pins that are usually available on embedded + architectures and can provide bit banging style devices to the system.</p> +<p class="Pp">The acronym <code class="Li">GPIO</code> means + “General-Purpose Input/Output.”</p> +<p class="Pp" id="iicbus">The BUS physically consists of multiple pins that can + be configured for input/output, IRQ delivery, SDA/SCL + <a class="permalink" href="#iicbus"><i class="Em">iicbus</i></a> use, + etc.</p> +<p class="Pp">On some embedded architectures (like MIPS), discovery of the bus + and configuration of the pins is done via <a class="Xr">device.hints(5)</a> + in the platform's kernel <a class="Xr">config(5)</a> file.</p> +<p class="Pp">On some others (like ARM), where <a class="Xr">FDT(4)</a> is used + to describe the device tree, the bus discovery is done via the DTS passed to + the kernel, being either statically compiled in, or by a variety of ways + where the boot loader (or Open Firmware enabled system) passes the DTS blob + to the kernel at boot.</p> +<p class="Pp">On a <a class="Xr">device.hints(5)</a> based system these hints + can be used to configure drivers for devices attached to + <code class="Nm">gpiobus</code> pins:</p> +<dl class="Bl-tag"> + <dt id="hint.driver.unit.at"><var class="Va">hint.driver.unit.at</var></dt> + <dd>The <code class="Nm">gpiobus</code> where the device is attached. For + example, "gpiobus0". <var class="Ar">driver</var> and + <var class="Ar">unit</var> are the driver name and the unit number for the + device driver.</dd> + <dt id="hint.driver.unit.pins"><var class="Va">hint.driver.unit.pins</var></dt> + <dd>This is a bitmask of the pins on the <code class="Nm">gpiobus</code> that + are connected to the device. The pins will be allocated to the specified + driver instance. Only pins with numbers from 0 to 31 can be specified + using this hint.</dd> + <dt id="hint.driver.unit.pin_list"><var class="Va">hint.driver.unit.pin_list</var></dt> + <dd>This is a list of pin numbers of pins on the + <code class="Nm">gpiobus</code> that are connected to the device. The pins + will be allocated to the specified driver instance. This is a more user + friendly alternative to the <var class="Ar">pins</var> hint. Additionally, + this hint allows specifying pin numbers greater than 31. The numbers can + be decimal or hexadecimal with 0x prefix. Any non-digit character can be + used as a separator. For example, it can be a comma, a slash or a space. + The separator can be followed by any number of space characters.</dd> +</dl> +<p class="Pp">The following <a class="Xr">device.hints(5)</a> are only provided + by the <code class="Cd">ar71xx_gpio</code> driver:</p> +<dl class="Bl-tag"> + <dt id="hint.gpio._d.pinmask"><var class="Va">hint.gpio.%d.pinmask</var></dt> + <dd>This is a bitmask of pins on the GPIO board that we would like to expose + for use to the host operating system. To expose pin 0, 4 and 7, use the + bitmask of 10010001 converted to the hexadecimal value 0x0091.</dd> + <dt id="hint.gpio._d.pinon"><var class="Va">hint.gpio.%d.pinon</var></dt> + <dd>This is a bitmask of pins on the GPIO board that will be set to ON at host + start. To set pin 2, 5 and 13 to be set ON at boot, use the bitmask of + 10000000010010 converted to the hexadecimal value 0x2012.</dd> + <dt id="hint.gpio.function_set"><var class="Va">hint.gpio.function_set</var></dt> + <dd style="width: auto;"> </dd> + <dt id="hint.gpio.function_clear"><var class="Va">hint.gpio.function_clear</var></dt> + <dd>These are bitmasks of pins that will remap a pin to handle a specific + function (USB, UART TX/RX, etc) in the Atheros function registers. This is + mainly used to set/clear functions that we need when they are set up or + not set up by uBoot.</dd> +</dl> +<p class="Pp">Simply put, each pin of the GPIO interface is connected to an + input/output of some device in a system.</p> +</section> +<section class="Sh"> +<h1 class="Sh" id="SEE_ALSO"><a class="permalink" href="#SEE_ALSO">SEE + ALSO</a></h1> +<p class="Pp"><a class="Xr">gpioiic(4)</a>, <a class="Xr">gpioled(4)</a>, + <a class="Xr">iicbus(4)</a>, <a class="Xr">device.hints(5)</a>, + <a class="Xr">gpioctl(8)</a></p> +</section> +<section class="Sh"> +<h1 class="Sh" id="HISTORY"><a class="permalink" href="#HISTORY">HISTORY</a></h1> +<p class="Pp">The <code class="Nm">gpiobus</code> manual page first appeared in + <span class="Ux">FreeBSD 10.0</span>.</p> +</section> +<section class="Sh"> +<h1 class="Sh" id="AUTHORS"><a class="permalink" href="#AUTHORS">AUTHORS</a></h1> +<p class="Pp">This manual page was written by <span class="An">Sean Bruno</span> + <<a class="Mt" href="mailto:sbruno@FreeBSD.org">sbruno@FreeBSD.org</a>>.</p> +</section> +</div> +<table class="foot"> + <tr> + <td class="foot-date">August 28, 2025</td> + <td class="foot-os">FreeBSD 15.0</td> + </tr> +</table> |